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  32 In-Reply-To: <bug-186-13-jh3pGIikod@http.bugs.libre-riscv.org/>
  33 References: <bug-186-13@http.bugs.libre-riscv.org/>
  34  <bug-186-13-jh3pGIikod@http.bugs.libre-riscv.org/>
  35 From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
  36 Date: Thu, 26 Mar 2020 12:59:16 +0000
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  39 To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
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  41 Subject: Re: [libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA
  42  and RISC-V
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