97/702baf6bef4e02ef214264bcb30c38faff90d6

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  11  for libre-riscv-dev@lists.libre-riscv.org; Wed, 15 Apr 2020 20:17:52 +0100
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  13 To: libre-riscv-dev@lists.libre-riscv.org
  14 Date: Wed, 15 Apr 2020 19:17:53 +0000
  15 X-Bugzilla-Reason: CC
  16 X-Bugzilla-Type: changed
  17 X-Bugzilla-Watch-Reason: None
  18 X-Bugzilla-Product: Libre-SOC's first SoC
  19 X-Bugzilla-Component: ALU (including IEEE754 16/32/64-bit FPU)
  20 X-Bugzilla-Version: unspecified
  21 X-Bugzilla-Keywords:
  22 X-Bugzilla-Severity: enhancement
  23 X-Bugzilla-Who: lkcl@lkcl.net
  24 X-Bugzilla-Status: CONFIRMED
  25 X-Bugzilla-Resolution:
  26 X-Bugzilla-Priority: ---
  27 X-Bugzilla-Assigned-To: mtnolan2640@gmail.com
  28 X-Bugzilla-Flags:
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  30 Message-ID: <bug-208-13-dQxVfTgDyo@https.bugs.libre-soc.org/>
  31 In-Reply-To: <bug-208-13@https.bugs.libre-soc.org/>
  32 References: <bug-208-13@https.bugs.libre-soc.org/>
  33 X-Bugzilla-URL: https://bugs.libre-soc.org/
  34 Auto-Submitted: auto-generated
  35 MIME-Version: 1.0
  36 Subject: [libre-riscv-dev] [Bug 208] implement CORDIC in a general way
  37  sufficient to do transcendentals
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