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  37 From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
  38 Date: Wed, 13 May 2020 19:18:06 +0100
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  41 To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
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  43 Subject: Re: [libre-riscv-dev] teaching the benefits of using nmigen over
  44  VHDL/Verilog
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