CHANGES

   1 [> 2020.XX, planned for July 2020
   2 ---------------------------------
   3
   4         [> Issues resolved
   5         ------------------
   6         - NA
   7
   8         [> Added Features
   9         ------------------
  10         - Pluggable CPUs.
  11         - Add nMigen dependency.
  12         - Properly integrate Minerva CPU.
  13
  14         [> API changes/Deprecation
  15         --------------------------
  16         - NA
  17
  18
  19 [> 2020.04, released April 28th, 2020
  20 -------------------------------------
  21
  22         [> Description
  23         --------------
  24         First release of LiteX and the ecosystem of cores!
  25
  26         LiteX is a Migen/MiSoC based Core/SoC builder that provides the infrastructure to easily create
  27         Cores/SoCs (with or without CPU).
  28
  29         The common components of a SoC are provided directly:
  30         - Buses and Streams (Wishbone, AXI, Avalon-ST)
  31         - Interconnect
  32         - Common cores (RAM, ROM, Timer, UART, etc...)
  33         - CPU wrappers/integration
  34         - etc...
  35         And SoC creation capabilities can be greatly extended with the ecosystem of LiteX cores (DRAM,
  36         PCIe, Ethernet, SATA, etc...) that can be integrated/simulated/build easily with LiteX.
  37
  38         It also provides build backends for open-source and vendors toolchains.
  39
  40         [> Issues resolved
  41         ------------------
  42         - NA
  43
  44         [> Added Features
  45         ------------------
  46         - NA
  47
  48         [> API changes/Deprecation
  49         --------------------------
  50         - https://github.com/enjoy-digital/litex/pull/399: Converting LiteX to use Python modules.