TLB/test/test_cam_entry.py

   1 import sys
   2 sys.path.append("../src")
   3 sys.path.append("../../TestUtil")
   4
   5 from nmigen.compat.sim import run_simulation
   6
   7 from test_helper import assert_eq, assert_ne
   8 from CamEntry import CamEntry
   9
  10 # This function allows for the easy setting of values to the Cam Entry
  11 # unless the key is incorrect
  12 # Arguments:
  13 #   dut: The CamEntry being tested
  14 #   c (command): NA (0), Read (1), Write (2), Reserve (3)
  15 #   k (key): The key to be set
  16 #   d (data): The data to be set
  17 def set_cam_entry(dut, c, k, d):
  18     # Write desired values
  19     yield dut.command.eq(c)
  20     yield dut.key_in.eq(k)
  21     yield dut.data_in.eq(d)
  22     yield
  23     # Reset all lines
  24     yield dut.command.eq(0)
  25     yield dut.key_in.eq(0)
  26     yield dut.data_in.eq(0)
  27     yield
  28
  29 # Checks the key state of the CAM entry
  30 # Arguments:
  31 #   dut: The CamEntry being tested
  32 #   k (Key): The expected key
  33 #   op (Operation): (0 => ==), (1 => !=)
  34 def check_key(dut, k, op):
  35     out_k = yield dut.key
  36     if op == 0:
  37         assert_eq("Key", out_k, k)
  38     else:
  39         assert_ne("Key", out_k, k)
  40
  41 # Checks the data state of the CAM entry
  42 # Arguments:
  43 #   dut: The CamEntry being tested
  44 #   d (Data): The expected data
  45 #   op (Operation): (0 => ==), (1 => !=)
  46 def check_data(dut, d, op):
  47     out_d = yield dut.data
  48     if op == 0:
  49         assert_eq("Data", out_d, d)
  50     else:
  51         assert_ne("Data", out_d, d)
  52
  53 # Checks the match state of the CAM entry
  54 # Arguments:
  55 #   dut: The CamEntry being tested
  56 #   m (Match): The expected match
  57 #   op (Operation): (0 => ==), (1 => !=)
  58 def check_match(dut, m, op):
  59     out_m = yield dut.match
  60     if op == 0:
  61         assert_eq("Match", out_m, m)
  62     else:
  63         assert_ne("Match", out_m, m)
  64
  65 # Checks the state of the CAM entry
  66 # Arguments:
  67 #   dut: The CamEntry being tested
  68 #   k (key): The expected key
  69 #   d (data): The expected data
  70 #   m (match): The expected match
  71 #   k_op (Operation): The operation for the key assertion (0 => ==), (1 => !=)
  72 #   d_op (Operation): The operation for the data assertion (0 => ==), (1 => !=)
  73 #   m_op (Operation): The operation for the match assertion (0 => ==), (1 => !=)
  74 def check_all(dut, k, d, m, k_op, d_op, m_op):
  75     yield from check_key(dut, k, k_op)
  76     yield from check_data(dut, d, d_op)
  77     yield from check_match(dut, m, m_op)
  78
  79 # This testbench goes through the paces of testing the CamEntry module
  80 # It is done by writing and then reading various combinations of key/data pairs
  81 # and reading the results with varying keys to verify the resulting stored
  82 # data is correct.
  83 def testbench(dut):
  84     # Check write
  85     command = 2
  86     key = 1
  87     data = 1
  88     match = 0
  89     yield from set_cam_entry(dut, command, key, data)
  90     yield from check_all(dut, key, data, match, 0, 0, 0)
  91
  92     # Check read miss
  93     command = 1
  94     key = 2
  95     data = 1
  96     match = 0
  97     yield from set_cam_entry(dut, command, key, data)
  98     yield from check_all(dut, key, data, match, 1, 0, 0)
  99
 100     # Check read hit
 101     command = 1
 102     key = 1
 103     data = 1
 104     match = 1
 105     yield from set_cam_entry(dut, command, key, data)
 106     yield from check_all(dut, key, data, match, 0, 0, 0)
 107
 108     # Check overwrite
 109     command = 2
 110     key = 2
 111     data = 5
 112     match = 0
 113     yield from set_cam_entry(dut, command, key, data)
 114     yield
 115     yield from check_all(dut, key, data, match, 0, 0, 0)
 116
 117     # Check read hit
 118     command = 1
 119     key = 2
 120     data = 5
 121     match = 1
 122     yield from set_cam_entry(dut, command, key, data)
 123     yield from check_all(dut, key, data, match, 0, 0, 0)
 124
 125     # Extra clock cycle for waveform
 126     yield
 127
 128 if __name__ == "__main__":
 129     dut = CamEntry(4, 4)
 130     run_simulation(dut, testbench(dut), vcd_name="Waveforms/cam_entry_test.vcd")
 131     print("CamEntry Unit Test Success")