6b4d7573fbce9bb5361997fe8b0046b870910dad
2 sys
.path
.append("../src")
3 sys
.path
.append("../../TestUtil")
5 from nmigen
.compat
.sim
import run_simulation
7 from PermissionValidator
import PermissionValidator
9 from test_helper
import assert_op
11 def set_validator(dut
, d
, xwr
, sm
, sa
, asid
):
14 yield dut
.super_mode
.eq(sm
)
15 yield dut
.super_access
.eq(sa
)
16 yield dut
.asid
.eq(asid
)
19 def check_valid(dut
, v
, op
):
20 out_v
= yield dut
.valid
21 assert_op("Valid", out_v
, v
, op
)
24 # 80 bits represented. Ignore the MSB as it will be truncated
25 # ASID is bits first 4 hex values (bits 64 - 78)
27 # Test user mode entry valid
28 # Global Bit matching ASID
29 # Ensure that user mode and valid is enabled!
30 data
= 0x7FFF0000000000000031
31 # Ignore MSB it will be truncated
37 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
38 yield from check_valid(dut
, valid
, 0)
40 # Test user mode entry valid
41 # Global Bit nonmatching ASID
42 # Ensure that user mode and valid is enabled!
43 data
= 0x7FFF0000000000000031
44 # Ignore MSB it will be truncated
50 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
51 yield from check_valid(dut
, valid
, 0)
53 # Test user mode entry invalid
54 # Global Bit nonmatching ASID
55 # Ensure that user mode and valid is enabled!
56 data
= 0x7FFF0000000000000021
57 # Ignore MSB it will be truncated
63 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
64 yield from check_valid(dut
, valid
, 0)
66 # Test user mode entry valid
67 # Ensure that user mode and valid is enabled!
68 data
= 0x7FFF0000000000000011
69 # Ignore MSB it will be truncated
75 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
76 yield from check_valid(dut
, valid
, 0)
78 # Test user mode entry invalid
79 # Ensure that user mode and valid is enabled!
80 data
= 0x7FFF0000000000000011
81 # Ignore MSB it will be truncated
87 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
88 yield from check_valid(dut
, valid
, 0)
90 # Test supervisor mode entry valid
91 # The entry is NOT in user mode
92 # Ensure that user mode and valid is enabled!
93 data
= 0x7FFF0000000000000001
94 # Ignore MSB it will be truncated
100 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
101 yield from check_valid(dut
, valid
, 0)
103 # Test supervisor mode entry invalid
104 # The entry is in user mode
105 # Ensure that user mode and valid is enabled!
106 data
= 0x7FFF0000000000000011
107 # Ignore MSB it will be truncated
113 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
114 yield from check_valid(dut
, valid
, 0)
116 # Test supervisor mode entry valid
117 # The entry is NOT in user mode with access
118 # Ensure that user mode and valid is enabled!
119 data
= 0x7FFF0000000000000001
120 # Ignore MSB it will be truncated
126 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
127 yield from check_valid(dut
, valid
, 0)
129 # Test supervisor mode entry valid
130 # The entry is in user mode with access
131 # Ensure that user mode and valid is enabled!
132 data
= 0x7FFF0000000000000011
133 # Ignore MSB it will be truncated
139 yield from set_validator(dut
, data
, xwr
, super_mode
, super_access
, asid
)
140 yield from check_valid(dut
, valid
, 0)
142 if __name__
== "__main__":
143 dut
= PermissionValidator(64 + 15);
144 run_simulation(dut
, testbench(dut
), vcd_name
="Waveforms/test_permission_validator.vcd")
145 print("PermissionValidator Unit Test Success")