TLB/test_cam_entry.py

   1 from nmigen.compat.sim import run_simulation
   2
   3 from CamEntry import CamEntry
   4
   5 #########
   6 # TESTING
   7 ########
   8
   9 # This function allows for the easy setting of values to the Cam Entry
  10 # unless the key is incorrect
  11 # Arguments:
  12 #   dut: The CamEntry being tested
  13 #   w (write): Read (0) or Write (1)
  14 #   k (key): The key to be set
  15 #   d (data): The data to be set
  16 def set_cam(dut, w, k, d):
  17     yield dut.write.eq(w)
  18     yield dut.key_in.eq(k)
  19     yield dut.data_in.eq(d)
  20     yield
  21
  22 # Verifies the given values via the requested operation
  23 # Arguments:
  24 #   pre (Prefix): Appended to the front of the assert statement
  25 #   e (Expected): The expected value
  26 #   out (Output): The output result
  27 #   op (Operation): (0 => ==), (1 => !=)
  28 def check(pre, e, out, op):
  29     if(op == 0):
  30         yield
  31         assert out == e, pre + " Output " + str(out) + " Expected " + str(e)
  32     else:
  33         yield
  34         assert out != e, pre + " Output " + str(out) + " Expected " + str(e)
  35
  36 # Checks the key state of the CAM entry
  37 # Arguments:
  38 #   dut: The CamEntry being tested
  39 #   k (Key): The expected key
  40 #   op (Operation): (0 => ==), (1 => !=)
  41 def check_key(dut, k, op):
  42     out_k = yield dut.key
  43     check("K", out_k, k, op)
  44
  45 # Checks the data state of the CAM entry
  46 # Arguments:
  47 #   dut: The CamEntry being tested
  48 #   d (Data): The expected data
  49 #   op (Operation): (0 => ==), (1 => !=)
  50 def check_data(dut, d, op):
  51     out_d = yield dut.data
  52     check("D", out_d, d, op)
  53
  54 # Checks the match state of the CAM entry
  55 # Arguments:
  56 #   dut: The CamEntry being tested
  57 #   m (Match): The expected match
  58 #   op (Operation): (0 => ==), (1 => !=)
  59 def check_match(dut, m, op):
  60     out_m = yield dut.match
  61     check("M", out_m, m, op)
  62
  63 # Checks the state of the CAM entry
  64 # Arguments:
  65 #   dut: The CamEntry being tested
  66 #   k (key): The expected key
  67 #   d (data): The expected data
  68 #   m (match): The expected match
  69 #   kop (Operation): The operation for the key assertion (0 => ==), (1 => !=)
  70 #   dop (Operation): The operation for the data assertion (0 => ==), (1 => !=)
  71 #   mop (Operation): The operation for the match assertion (0 => ==), (1 => !=)
  72 def check_all(dut, k, d, m, kop, dop, mop):
  73     yield from check_key(dut, k, kop)
  74     yield from check_data(dut, d, dop)
  75     yield from check_match(dut, m, mop)
  76
  77 # This testbench goes through the paces of testing the CamEntry module
  78 # It is done by writing and then reading various combinations of key/data pairs
  79 # and reading the results with varying keys to verify the resulting stored
  80 # data is correct.
  81 def testbench(dut):
  82     # Check write
  83     write = 1
  84     key = 1
  85     data = 1
  86     match = 1
  87     yield from set_cam(dut, write, key, data)
  88     yield from check_all(dut, key, data, match, 0, 0, 0)
  89
  90     # Check read miss
  91     write = 0
  92     key = 2
  93     data = 1
  94     match = 0
  95     yield from set_cam(dut, write, key, data)
  96     yield from check_all(dut, key, data, match, 1, 0, 0)
  97
  98     # Check read hit
  99     write = 0
 100     key = 1
 101     data = 1
 102     match = 1
 103     yield from set_cam(dut, write, key, data)
 104     yield from check_all(dut, key, data, match, 0, 0, 0)
 105
 106     # Check overwrite
 107     write = 1
 108     key = 2
 109     data = 5
 110     match = 1
 111     yield from set_cam(dut, write, key, data)
 112     yield from check_all(dut, key, data, match, 0, 0, 0)
 113
 114     yield
 115
 116 if __name__ == "__main__":
 117     dut = CamEntry(4, 4)
 118     run_simulation(dut, testbench(dut), vcd_name="Waveforms/cam_entry_test.vcd")