2 * yosys -- Yosys Open SYnthesis Suite
4 * Copyright (C) 2012 Aki "lethalbit" Van Ness <aki@yosyshq.com> <aki@lethalbit.net>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include "kernel/rtlil.h"
21 #include "kernel/register.h"
22 #include "kernel/sigtools.h"
23 #include "kernel/celltypes.h"
24 #include "kernel/cellaigs.h"
25 #include "kernel/log.h"
27 #include <unordered_map>
31 PRIVATE_NAMESPACE_BEGIN
39 std::unordered_map
<std::string
, std::vector
<Cell
*>> _cells
{};
41 bool _include_connections
;
42 bool _include_attributes
;
43 bool _include_properties
;
45 // XXX(aki): this was pulled from the json backend, needs to be pulled
46 // out possibly into some sort of utilities file, or integrated into rtlil.h
48 string
get_string(string str
)
59 // XXX(aki): I know this is far from ideal but i'm out of spoons and cant focus so
60 // it'll have to do for now,
61 void coalesce_cells(Module
* mod
)
63 for (auto cell
: mod
->cells()) {
64 const auto cell_type
= get_string(RTLIL::unescape_id(cell
->type
));
66 if (_cells
.find(cell_type
) == _cells
.end())
67 _cells
.emplace(cell_type
, std::vector
<Cell
*>());
69 _cells
.at(cell_type
).push_back(cell
);
73 // XXX(aki): this is a lazy way to do this i know,,,
74 std::string
gen_indent(const uint16_t level
)
77 for (uint16_t i
= 0; i
<= level
; ++i
)
85 JnyWriter(std::ostream
&f
, bool use_selection
, bool connections
, bool attributes
, bool properties
) noexcept
:
86 f
{f
}, _use_selection
{use_selection
},
87 _include_connections
{connections
}, _include_attributes
{attributes
}, _include_properties
{properties
}
90 void write_metadata(Design
*design
, uint16_t indent_level
= 0)
92 log_assert(design
!= nullptr);
97 f
<< stringf(" \"generator\": %s,\n", get_string(yosys_version_str
).c_str());
98 // XXX(aki): Replace this with a proper version info eventually:tm:
99 f
<< " \"version\": \"0.0.0\",\n";
101 f
<< " \"features\": [";
104 if (_include_connections
) {
106 f
<< "\"connections\"";
109 if (_include_attributes
) {
113 f
<< "\"attributes\"";
116 if (_include_properties
) {
120 f
<< "\"properties\"";
125 f
<< " \"modules\": [\n";
128 for (auto mod
: _use_selection
? design
->selected_modules() : design
->modules()) {
131 write_module(mod
, indent_level
+ 2);
140 void write_sigspec(const RTLIL::SigSpec
& sig
, uint16_t indent_level
= 0) {
141 const auto _indent
= gen_indent(indent_level
);
143 f
<< _indent
<< " {\n";
144 f
<< _indent
<< " \"width\": \"" << sig
.size() << "\",\n";
145 f
<< _indent
<< " \"type\": \"";
149 } else if (sig
.is_chunk()) {
151 } else if (sig
.is_bit()) {
158 f
<< _indent
<< " \"const\": ";
159 if (sig
.has_const()) {
167 f
<< _indent
<< " }";
170 void write_mod_conn(const std::pair
<RTLIL::SigSpec
, RTLIL::SigSpec
>& conn
, uint16_t indent_level
= 0) {
171 const auto _indent
= gen_indent(indent_level
);
172 f
<< _indent
<< " {\n";
173 f
<< _indent
<< " \"signals\": [\n";
175 write_sigspec(conn
.first
, indent_level
+ 2);
177 write_sigspec(conn
.second
, indent_level
+ 2);
180 f
<< _indent
<< " ]\n";
181 f
<< _indent
<< " }";
184 void write_cell_conn(const std::pair
<RTLIL::IdString
, RTLIL::SigSpec
>& sig
, uint16_t indent_level
= 0) {
185 const auto _indent
= gen_indent(indent_level
);
186 f
<< _indent
<< " {\n";
187 f
<< _indent
<< " \"name\": " << get_string(RTLIL::unescape_id(sig
.first
)) << ",\n";
188 f
<< _indent
<< " \"signals\": [\n";
190 write_sigspec(sig
.second
, indent_level
+ 2);
193 f
<< _indent
<< " ]\n";
194 f
<< _indent
<< " }";
197 void write_module(Module
* mod
, uint16_t indent_level
= 0) {
198 log_assert(mod
!= nullptr);
202 const auto _indent
= gen_indent(indent_level
);
204 f
<< _indent
<< "{\n";
205 f
<< stringf(" %s\"name\": %s,\n", _indent
.c_str(), get_string(RTLIL::unescape_id(mod
->name
)).c_str());
206 f
<< _indent
<< " \"cell_sorts\": [\n";
208 bool first_sort
{true};
209 for (auto& sort
: _cells
) {
212 write_cell_sort(sort
, indent_level
+ 2);
217 f
<< _indent
<< " ]";
218 if (_include_connections
) {
219 f
<< ",\n" << _indent
<< " \"connections\": [\n";
221 bool first_conn
{true};
222 for (const auto& conn
: mod
->connections()) {
226 write_mod_conn(conn
, indent_level
+ 2);
231 f
<< _indent
<< " ]";
233 if (_include_attributes
) {
234 f
<< ",\n" << _indent
<< " \"attributes\": {\n";
236 write_prams(mod
->attributes
, indent_level
+ 2);
239 f
<< _indent
<< " }";
241 f
<< "\n" << _indent
<< "}";
244 void write_cell_ports(RTLIL::Cell
* port_cell
, uint64_t indent_level
= 0) {
245 const auto _indent
= gen_indent(indent_level
);
247 bool first_port
{true};
248 for (auto con
: port_cell
->connections()) {
252 f
<< _indent
<< " {\n";
253 f
<< stringf(" %s\"name\": %s,\n", _indent
.c_str(), get_string(RTLIL::unescape_id(con
.first
)).c_str());
254 f
<< _indent
<< " \"direction\": \"";
255 if (port_cell
->input(con
.first
))
257 if (port_cell
->input(con
.first
))
260 if (con
.second
.size() == 1)
261 f
<< _indent
<< " \"range\": [0, 0]\n";
263 f
<< stringf(" %s\"range\": [%d, %d]\n", _indent
.c_str(), con
.second
.size(), 0);
264 f
<< _indent
<< " }";
272 void write_cell_sort(std::pair
<const std::string
, std::vector
<Cell
*>>& sort
, uint16_t indent_level
= 0) {
273 const auto port_cell
= sort
.second
.front();
274 const auto _indent
= gen_indent(indent_level
);
276 f
<< _indent
<< "{\n";
277 f
<< stringf(" %s\"type\": %s,\n", _indent
.c_str(), sort
.first
.c_str());
278 f
<< _indent
<< " \"ports\": [\n";
280 write_cell_ports(port_cell
, indent_level
+ 2);
282 f
<< _indent
<< " ],\n" << _indent
<< " \"cells\": [\n";
284 bool first_cell
{true};
285 for (auto& cell
: sort
.second
) {
289 write_cell(cell
, indent_level
+ 2);
295 f
<< _indent
<< " ]\n";
299 void write_param_val(const Const
& v
) {
300 if ((v
.flags
& RTLIL::ConstFlags::CONST_FLAG_STRING
) == RTLIL::ConstFlags::CONST_FLAG_STRING
) {
301 const auto str
= v
.decode_string();
303 // XXX(aki): TODO, uh, yeah
305 f
<< get_string(str
);
306 } else if ((v
.flags
& RTLIL::ConstFlags::CONST_FLAG_SIGNED
) == RTLIL::ConstFlags::CONST_FLAG_SIGNED
) {
307 f
<< stringf("\"%dsd %d\"", v
.size(), v
.as_int());
308 } else if ((v
.flags
& RTLIL::ConstFlags::CONST_FLAG_REAL
) == RTLIL::ConstFlags::CONST_FLAG_REAL
) {
311 f
<< get_string(v
.as_string());
315 void write_prams(dict
<RTLIL::IdString
, RTLIL::Const
>& params
, uint16_t indent_level
= 0) {
316 const auto _indent
= gen_indent(indent_level
);
318 bool first_param
{true};
319 for (auto& param
: params
) {
322 const auto param_val
= param
.second
;
323 if (!param_val
.empty()) {
324 f
<< stringf(" %s%s: ", _indent
.c_str(), get_string(RTLIL::unescape_id(param
.first
)).c_str());
325 write_param_val(param_val
);
327 f
<< stringf(" %s%s: true", _indent
.c_str(), get_string(RTLIL::unescape_id(param
.first
)).c_str());
334 void write_cell(Cell
* cell
, uint16_t indent_level
= 0) {
335 const auto _indent
= gen_indent(indent_level
);
336 log_assert(cell
!= nullptr);
338 f
<< _indent
<< " {\n";
339 f
<< stringf(" %s\"name\": %s", _indent
.c_str(), get_string(RTLIL::unescape_id(cell
->name
)).c_str());
341 if (_include_connections
) {
342 f
<< ",\n" << _indent
<< " \"connections\": [\n";
344 bool first_conn
{true};
345 for (const auto& conn
: cell
->connections()) {
349 write_cell_conn(conn
, indent_level
+ 2);
355 f
<< _indent
<< " ]";
358 if (_include_attributes
) {
359 f
<< ",\n" << _indent
<< " \"attributes\": {\n";
361 write_prams(cell
->attributes
, indent_level
+ 2);
364 f
<< _indent
<< " }";
367 if (_include_properties
) {
368 f
<< ",\n" << _indent
<< " \"parameters\": {\n";
370 write_prams(cell
->parameters
, indent_level
+ 2);
373 f
<< _indent
<< " }";
376 f
<< "\n" << _indent
<< " }";
380 struct JnyBackend
: public Backend
{
381 JnyBackend() : Backend("jny", "generate design metadata") { }
382 void help() override
{
383 // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
385 log(" jny [options] [selection]\n");
387 log(" -connections\n");
388 log(" Include connection information in the netlist output.\n");
390 log(" -attributes\n");
391 log(" Include attributed information in the netlist output.\n");
393 log(" -properties\n");
394 log(" Include property information in the netlist output.\n");
396 log("Write a JSON metadata for the current design\n");
401 void execute(std::ostream
*&f
, std::string filename
, std::vector
<std::string
> args
, RTLIL::Design
*design
) override
{
403 bool connections
{false};
404 bool attributes
{false};
405 bool properties
{false};
408 for (; argidx
< args
.size(); argidx
++) {
409 if (args
[argidx
] == "-connections") {
414 if (args
[argidx
] == "-attributes") {
419 if (args
[argidx
] == "-properties") {
426 extra_args(f
, filename
, args
, argidx
);
428 log_header(design
, "Executing jny backend.\n");
430 JnyWriter
jny_writer(*f
, false, connections
, attributes
, properties
);
431 jny_writer
.write_metadata(design
);
437 struct JnyPass
: public Pass
{
438 JnyPass() : Pass("jny", "write design and metadata") { }
440 void help() override
{
441 // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
443 log(" jny [options] [selection]\n");
445 log("Write a JSON netlist metadata for the current design\n");
447 log(" -o <filename>\n");
448 log(" write to the specified file.\n");
450 log(" -connections\n");
451 log(" Include connection information in the netlist output.\n");
453 log(" -attributes\n");
454 log(" Include attributed information in the netlist output.\n");
456 log(" -properties\n");
457 log(" Include property information in the netlist output.\n");
459 log("See 'help write_jny' for a description of the JSON format used.\n");
462 void execute(std::vector
<std::string
> args
, RTLIL::Design
*design
) override
{
463 std::string filename
{};
465 bool connections
{false};
466 bool attributes
{false};
467 bool properties
{false};
470 for (; argidx
< args
.size(); argidx
++) {
471 if (args
[argidx
] == "-o" && argidx
+1 < args
.size()) {
472 filename
= args
[++argidx
];
476 if (args
[argidx
] == "-connections") {
481 if (args
[argidx
] == "-attributes") {
486 if (args
[argidx
] == "-properties") {
493 extra_args(args
, argidx
, design
);
496 std::stringstream buf
;
498 if (!filename
.empty()) {
499 rewrite_filename(filename
);
500 std::ofstream
*ff
= new std::ofstream
;
501 ff
->open(filename
.c_str(), std::ofstream::trunc
);
504 log_error("Can't open file `%s' for writing: %s\n", filename
.c_str(), strerror(errno
));
512 JnyWriter
jny_writer(*f
, false, connections
, attributes
, properties
);
513 jny_writer
.write_metadata(design
);
515 if (!filename
.empty()) {
518 log("%s", buf
.str().c_str());
524 PRIVATE_NAMESPACE_END