c1/eae4754bbd083de08f6e261e875eb8929e4b74

   1 Return-path: <libre-riscv-dev-bounces@lists.libre-riscv.org>
   2 Envelope-to: publicinbox@libre-riscv.org
   3 Delivery-date: Sat, 09 May 2020 10:12:49 +0100
   4 Received: from localhost ([::1] helo=libre-riscv.org)
   5         by libre-soc.org with esmtp (Exim 4.89)
   6         (envelope-from <libre-riscv-dev-bounces@lists.libre-riscv.org>)
   7         id 1jXLXM-0005eI-MO; Sat, 09 May 2020 10:12:48 +0100
   8 Received: from vps2.stafverhaegen.be ([85.10.201.15])
   9  by libre-soc.org with esmtp (Exim 4.89)
  10  (envelope-from <staf@fibraservi.eu>) id 1jXLXK-0005eC-RZ
  11  for libre-riscv-dev@lists.libre-riscv.org; Sat, 09 May 2020 10:12:46 +0100
  12 Received: from hpdc7800 (hpdc7800 [10.0.0.1])
  13  by vps2.stafverhaegen.be (Postfix) with ESMTP id 0BEDB11C04F6
  14  for <libre-riscv-dev@lists.libre-riscv.org>;
  15  Sat,  9 May 2020 11:12:46 +0200 (CEST)
  16 Message-ID: <792ac37b0c72350337f07c758d51a24eaa9ac532.camel@fibraservi.eu>
  17 From: Staf Verhaegen <staf@fibraservi.eu>
  18 To: libre-riscv-dev@lists.libre-riscv.org
  19 Date: Sat, 09 May 2020 11:12:40 +0200
  20 In-Reply-To: <3BD26F5C-BB6D-4011-89E6-EC06215DEDEA@gatech.edu>
  21 References: <3BD26F5C-BB6D-4011-89E6-EC06215DEDEA@gatech.edu>
  22 Organization: FibraServi bvba
  23 X-Mailer: Evolution 3.28.5 (3.28.5-8.el7)
  24 Mime-Version: 1.0
  25 X-Content-Filtered-By: Mailman/MimeDel 2.1.23
  26 Subject: Re: [libre-riscv-dev] Pinout, interfaces, Rudi, and Raptor
  27 X-BeenThere: libre-riscv-dev@lists.libre-riscv.org
  28 X-Mailman-Version: 2.1.23
  29 Precedence: list
  30 List-Id: Libre-RISCV General Development
  31  <libre-riscv-dev.lists.libre-riscv.org>
  32 List-Unsubscribe: <http://lists.libre-riscv.org/mailman/options/libre-riscv-dev>,
  33  <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=unsubscribe>
  34 List-Archive: <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
  35 List-Post: <mailto:libre-riscv-dev@lists.libre-riscv.org>
  36 List-Help: <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=help>
  37 List-Subscribe: <http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev>,
  38  <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=subscribe>
  39 Reply-To: Libre-RISCV General Development
  40  <libre-riscv-dev@lists.libre-riscv.org>
  41 Content-Type: multipart/mixed; boundary="===============1441781585780467197=="
  42 Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org
  43 Sender: "libre-riscv-dev" <libre-riscv-dev-bounces@lists.libre-riscv.org>
  44
  45
  46 --===============1441781585780467197==
  47 Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature";
  48         boundary="=-q7g7wYzd/YlocVdASqQr"
  49
  50
  51 --=-q7g7wYzd/YlocVdASqQr
  52 Content-Type: text/plain; charset="UTF-8"
  53 Content-Transfer-Encoding: quoted-printable
  54
  55 Yehowshua schreef op vr 08-05-2020 om 10:20 [-0400]:
  56 > Hello Luke,   So I see we have some pinout sdefine here.
  57 > https://libre-soc.org/shakti/m_class/pinouts/ <https://libre-soc.org/shak=
  58 ti/m_class/pinouts/>
  59 >=20
  60 > My suggestion is to drop the pinmux for now. We should probably update th=
  61 at page(or create a similar page) to reflect what we=E2=80=99re targeting f=
  62 or October.
  63 > IIRC, we=E2=80=99re targeting QFP. I don=E2=80=99t see the dimensions or =
  64 form factor we=E2=80=99re targeting listed there however. We should talk ab=
  65 out that.
  66 > Also, talked with Tim and SDR could work for the first SBC. LiteX also su=
  67 pports SDR which is good for us as it doesn=E2=80=99t require a PHY like DD=
  68 R making it simpler.
  69
  70 You refer to a first SBC preferably low-cost. The October prototype tape-ou=
  71 t will not be cost-effective for that. It is a multi-project wafer. You can=
  72  order extra wafers but it does mean that the cost of that wafer is divided=
  73  over much less devices; meaning the cost will be around $32 per chip and s=
  74 ome of them will not be functional; in microelectrics you never have 100% y=
  75 ield. Also I think there is limit on only be able to get at most 1000 chips=
  76  this way.
  77
  78 If you want lower cost per unit you need to go for a full mask with a so-ca=
  79 lled engineering lot of 12 wafers. This will have a high startup cost. A fi=
  80 rst crude estimation is between $70000 and $75000. This give a few thousand=
  81  of chips; exact number depends on the size of the chip. An extra engineeri=
  82 ng lot of 12 wafers will be around $18000.
  83 For this it means you will need to a new tape-out so you can add extra peri=
  84 pherals that were not on the prototype tape-out.
  85
  86 greets,
  87 Staf.
  88
  89
  90 --=-q7g7wYzd/YlocVdASqQr--
  91
  92
  93
  94 --===============1441781585780467197==
  95 Content-Type: text/plain; charset="utf-8"
  96 MIME-Version: 1.0
  97 Content-Transfer-Encoding: base64
  98 Content-Disposition: inline
  99
 100 X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGlicmUtcmlz
 101 Y3YtZGV2IG1haWxpbmcgbGlzdApsaWJyZS1yaXNjdi1kZXZAbGlzdHMubGlicmUtcmlzY3Yub3Jn
 102 Cmh0dHA6Ly9saXN0cy5saWJyZS1yaXNjdi5vcmcvbWFpbG1hbi9saXN0aW5mby9saWJyZS1yaXNj
 103 di1kZXYK
 104
 105 --===============1441781585780467197==--
 106
 107
 108