0c1a08346f884b99af0c7acbe9320ac23b694a6d
2 from cocotb
.clock
import Clock
3 from cocotb
.triggers
import Timer
4 from cocotb
.utils
import get_sim_steps
5 from cocotb
.binary
import BinaryValue
7 from c4m
.cocotb
.jtag
.c4m_jtag
import JTAG_Master
8 from c4m
.cocotb
.jtag
.c4m_jtag_svfcocotb
import SVF_Executor
14 def setup_sim(dut
, *, clk_period
, run
):
15 """Initialize CPU and setup clock"""
17 clk_steps
= get_sim_steps(clk_period
, "ns")
18 cocotb
.fork(Clock(dut
.sys_clk
, clk_steps
).start())
23 yield Timer(int(10.5*clk_steps
))
25 yield Timer(int(5*clk_steps
))
27 def setup_jtag(dut
, *, tck_period
):
28 # Make this a generator
31 return JTAG_Master(dut
.jtag_tck
, dut
.jtag_tms
, dut
.jtag_tdi
, dut
.jtag_tdo
, clk_period
=tck_period
)
33 def execute_svf(dut
, *, jtag
, svf_filename
):
34 jtag_svf
= SVF_Executor(jtag
)
35 with
open(svf_filename
, "r") as f
:
37 yield jtag_svf
.run(svf_deck
, p
=dut
._log
.info
)
40 # IDCODE using JTAG_master
43 def idcode(dut
, *, jtag
):
44 jtag
.IDCODE
= [0, 0, 0, 1]
47 dut
._log
.info("IDCODE1: {}".format(result1
))
48 assert(result1
== BinaryValue("00000000000000000001100011111111"))
52 dut
._log
.info("IDCODE2: {}".format(result2
))
54 assert(result1
== result2
)
57 def idcode_reset(dut
):
58 dut
._log
.info("Running IDCODE test; cpu in reset...")
60 clk_period
= 100 # 10MHz
61 tck_period
= 300 # 3MHz
63 yield from setup_sim(dut
, clk_period
=clk_period
, run
=False)
64 jtag
= yield from setup_jtag(dut
, tck_period
= tck_period
)
66 yield from idcode(dut
, jtag
=jtag
)
68 dut
._log
.info("IDCODE test completed")
72 dut
._log
.info("Running IDCODE test; cpu running...")
74 clk_period
= 100 # 10MHz
75 tck_period
= 300 # 3MHz
77 yield from setup_sim(dut
, clk_period
=clk_period
, run
=True)
78 jtag
= yield from setup_jtag(dut
, tck_period
= tck_period
)
80 yield from idcode(dut
, jtag
=jtag
)
82 dut
._log
.info("IDCODE test completed")
85 # Read IDCODE from SVF file
89 def idcodesvf_reset(dut
):
90 dut
._log
.info("Running IDCODE through SVF test; cpu in reset...")
92 clk_period
= 100 # 10MHz
93 tck_period
= 300 # 3MHz
95 yield from setup_sim(dut
, clk_period
=clk_period
, run
=False)
96 jtag
= yield from setup_jtag(dut
, tck_period
= tck_period
)
98 yield from execute_svf(dut
, jtag
=jtag
, svf_filename
="idcode.svf")
100 dut
._log
.info("IDCODE test completed")
104 dut
._log
.info("Running IDCODE through test; cpu running...")
106 clk_period
= 100 # 10MHz
107 tck_period
= 300 # 3MHz
109 yield from setup_sim(dut
, clk_period
=clk_period
, run
=True)
110 jtag
= yield from setup_jtag(dut
, tck_period
= tck_period
)
112 yield from execute_svf(dut
, jtag
=jtag
, svf_filename
="idcode.svf")
114 dut
._log
.info("IDCODE test completed")