distrib/share/etc/ReleaseNotes3.2

   1 ###############################################################################
   2 # AvtTools version 3.2p13 Release Notes
   3 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
   4 # Jun 20th, 2008
   5 #
   6 ###############################################################################
   7
   8 # 1 - New functionalities
   9   - False access path settings fully taken into account during slack analysis.
  10   - New TCL command "stb_DisplayCoverage" which dumps a report with statistics
  11     of how many timing nodes have bben checked and details of those which have
  12     not been checked.
  13   - Support of SDC command "set_clock_uncertainty".
  14   - Support of SDC commands "set_max_delay" and ""set_min_delay" as additional
  15     timing checks.
  16   - Support of CDL syntax .PININFO to orient subckt pins.
  17   - Support for orientation of signals mapped to pins of cells recognised
  18     using GNS.
  19   - Reporting of probable badly identified gates in .REP file.
  20   - Option to attempt to guess any necessary MUTEX settings, activated by
  21     "yagMutexHelp" configuration variable.
  22
  23 # 2 - Bug fixes
  24   - Selective handling of parasitics on current paths.
  25   - Issue in parasitic delay recalculation on signals without drivers.
  26
  27
  28 ###############################################################################
  29 # AvtTools version 3.2p12 Release Notes
  30 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
  31 # Jun 13th, 2008
  32 #
  33 ###############################################################################
  34
  35 # 1 - New functionalities
  36   - Generation of avt_env.sh during the installation.
  37
  38 # 2 - Bug fixes
  39   - Fixed an error if "bus_naming_style" is missing in .lib files.
  40   - Fixed an error if "pulling_resistance_unit" is missing in .lib files.
  41
  42 ###############################################################################
  43 # AvtTools version 3.2p11 Release Notes
  44 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
  45 # Jun 4th, 2008
  46 #
  47 ###############################################################################
  48
  49 # 1 - New functionalities
  50   - Recognition of Level-Hold structures containing resistive transistors.
  51   - Experimental faster transistor characterisation to accelerate
  52     statistical analysis.
  53
  54 # 2 - Bug fixes
  55   - Fixed a fatal error handling transistor M factors in certain cases.
  56
  57 ###############################################################################
  58 # AvtTools version 3.2p10 Release Notes
  59 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
  60 # May 21st, 2008
  61 #
  62 ###############################################################################
  63
  64 # 1 - New functionalities
  65   - Possibilty to use an external dynamically linked library for transistor
  66     characterisation.
  67
  68 ###############################################################################
  69 # AvtTools version 3.2p9 Release Notes
  70 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
  71 # May 16th, 2008
  72 #
  73 ###############################################################################
  74
  75 # 1 - Bug fixes
  76   - Fixed an issue of slow database generation in some schematic netlists.
  77   - Fixed an issue where clock was incorrectly identified in precharges
  78     when data inputs were filtered by other clocks.
  79
  80 ###############################################################################
  81 # AvtTools version 3.2p8 Release Notes
  82 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
  83 # May 15th, 2008
  84 #
  85 ###############################################################################
  86
  87 # 1 - New functionalities
  88   - More precise delay calculation for pass-transistors when gate is voltage
  89     boosted.
  90
  91 # 2 - Bug fixes
  92   - Fixed a spicedeck generation issue of blocked transistors being
  93     incorrectly polarised.
  94
  95 ###############################################################################
  96 # AvtTools version 3.2p7 Release Notes
  97 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
  98 # May 2nd, 2008
  99 #
 100 ###############################################################################
 101
 102 # 1 - New functionalities
 103   - Technology and netlist encryption using new TCL command "avt_EncryptSpice",
 104     encrypted files are decrypted automatically.
 105   - Support for SDC command "set_clock_uncertainty".
 106
 107 # 2 - Bug fixes
 108   - Fixed a stability issue when latches were missing clock definition.
 109   - Wildcards now work for specifying clock pins.
 110
 111 ###############################################################################
 112 # AvtTools version 3.2p6 Release Notes
 113 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
 114 # Apr 21st, 2008
 115 #
 116 ###############################################################################
 117
 118 # 1 - Bug fixes
 119   - Fixed a syntax ambiguity in the spice parser between models bounded by
 120     brackets and functions which are space separated from their arguments.
 121
 122 ###############################################################################
 123 # AvtTools version 3.2p5 Release Notes
 124 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
 125 # Apr 17th, 2008
 126 #
 127 ###############################################################################
 128
 129 # 1 - New functionalities
 130   - Enhancement in "tmabs" for handling blackbox constraints at the interface.
 131   - Spice units enhancement.
 132   - Disabling of transistor diode detection.
 133
 134 # 2 - Bug fixes
 135   - Fixed a special case in BSIM4 parameter handling.
 136   - TCL_LIBRARY setting when using SDC commands.
 137   - Fixed an issue of handling capacitances through transfer gates.
 138   - Better handling of BYPASS in "tma_abstract".
 139   - Better handling of LIB parser functionnality.
 140
 141 ###############################################################################
 142 # AvtTools version 3.2p4 Release Notes
 143 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
 144 # Mar 31st, 2008
 145 #
 146 ###############################################################################
 147
 148 # 1 - New functionalities
 149   - avt_shell is now based on Tcl 8.5.1
 150   - New setting "avtSpiUseUnits" which allows the use of units in driven spicedeck.
 151   - Some API's are now with variable arguments: "stb_GetSlacks", "ttv_ProbeDelay",
 152     "ttv_GetPaths" and "ttv_DisplaySlackReport".
 153   - New API "hitas_pvt_count" which returns the number of PVT errors encountered in
 154     the last Hitas run.
 155   - New API "stb_ComputeSlacks" computing slacks directly from list of paths.
 156   - Better handling of breakpoints in STA.
 157   - Non-driven cones are set as breakpoints and paths from them are created.
 158   - Enhancement of latch and memsym detection/configuration.
 159
 160 # 2 - Bug fixes
 161   - Corrected an issue when diodes and transistors have same model name.
 162   - Fixed clock edge synchronization for multiple clock domains in STA.
 163   - Fixed an issue in computing intrinsic setup/hold values.
 164   - Enhancement of blocked transitors driven in spicedeck.
 165
 166 # 3 - Configuration changes
 167   - Added setting "include" in "avtSpiParseFirstLine".
 168   - The setting of "avtErrorPolicy" is "strict" by default.
 169   - The setting of "tasGenerateConeFile" is defaulted to "yes".
 170
 171 ###############################################################################
 172 # AvtTools version 3.2p3 Release Notes
 173 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
 174 # Mar 18th, 2008
 175 #
 176 ###############################################################################
 177
 178 # 1 - Bug fixes
 179   - Fixed an issue in configuration of environment variables.
 180
 181 ###############################################################################
 182 # AvtTools version 3.2p2 Release Notes
 183 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
 184 # Mar 7th, 2008
 185 #
 186 ###############################################################################
 187
 188 # 1 - New functionalities
 189   - New tutorial.
 190
 191 # 2 - Bug fixes
 192   - TMA correctly handles output load dependence when parasitics are present.
 193
 194 ###############################################################################
 195 # AvtTools version 3.2p1 Release Notes
 196 # Copyright (c) 1998-2008, AVERTEC All Rights Reserved
 197 # Feb 20th, 2008
 198 #
 199 ###############################################################################
 200
 201 # 1 - New functionalities
 202   - slew_derate_from_library in LIB can be tuned with the variable "tmaLibSlewDerate".
 203   - CPE is now compatible with Mspice.
 204   - .lib inside .subckt is now supported in spice.
 205   - Enhancement of error messages for computed expressions.
 206
 207 # 2 - Bug fixes
 208   - False slacks computed in STB.
 209
 210 ###############################################################################
 211 # AvtTools version 3.2 Release Notes
 212 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 213 # Dec 3rd, 2007
 214 #
 215 ###############################################################################
 216
 217 # 1 - New functionalities
 218   - On-line help in avt_shell, type "help help" in avt_shell for details.
 219   - New API "tmabs", replacement for "tma_abstract" API. This new function
 220     provides the following advantages:
 221     + identical configuration for characterization using the HiTAS timing
 222       engine or characterization using an external Spice simulator.
 223     + A common base with the standard path report functions such as
 224       ConnectorToLatchMargin and Access Paths which guarantees results
 225       consistency and allows easy user configuration and results check.
 226     + Support for partial characterization, i.e. the user can specify which
 227       pins to characterize.
 228     + Clock-gating checks are reported in the LIB.
 229     + Setup/Hold constraints relative to generated clocks are handled.
 230   - New TCL Constraint Objects. Compound object, representing a setup/hold
 231     timing constraint, made up of the relevant data and clock path components
 232     together with intrinsic setup/hold. This object is used internally by
 233     the new "tmabs" and by "ConnectorToLatchMargin". The object also handles
 234     generated clocks correctly.
 235   - New properties for timing path object:
 236      "TYPE", "IS_HZ", "PATH_MARGIN_FACTOR", "PATH_MARGIN_DELTA"
 237   - New property "IS_ASYNCHRONOUS" for timing signal object.
 238   - CPE is now capable of calculating simulation patterns for RS loops
 239     and symmetric memory cells.
 240   - CPE is now capable of generating simulation measures for HZ paths.
 241   - Slack reports for user-defined timing checks show details of all slacks
 242     separated by THRU latch and command and not just the worst case.
 243     This is the same behaviour as for a normal timing check.
 244   - Better handling of "counter" style clocking schemes since nodes with
 245     a generated clock directive are now verified and can be sources of data.
 246   - M-factor now handled by Spice parser for Instances, Resistors and
 247     Capacitors as well as Transistors.
 248   - The automatic false path detection algorithm can now handle access paths.
 249   - New setting "avtEnableMultipleConnectorsOnNet", which, when set to "yes",
 250     handles multiple pin connections on a single logical net. This can be
 251     useful to avoid disappearance of external pins for a generated LIB file.
 252     However, this option should not be used unless strictly necessary.
 253   - New setting "tmaLibDriveTableIndex", which, when set to "yes" means that
 254     any LIB files are generated with axes specified individually for each
 255     look-up table instead of being only in the template.
 256
 257 # 2 - Bug fixes
 258   - Corrected ordering issue in delay recalculation (e.g. ttv_RecomputeDelays)
 259     which meant some timings were not recalculated.
 260   - Corrected "set_false_path" matching issue in rare cases where the path
 261     contained parasitics.
 262   - Fixed an issue which led to breakpoints being eliminated if there was
 263     no timing path reaching the breakpoint.
 264
 265 # 3 - Configuration changes
 266   - Property "FIGNAME" for object TimingFigure is obsolete, use "NAME"
 267
 268 # 4 - Feature changes
 269   - The effect of a multicycle path directive is now reported in the
 270     DATA REQUIRED component of a slack.
 271
 272 ###############################################################################
 273 # AvtTools version 3.1p6 Release Notes
 274 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 275 # Sep 3rd, 2007
 276 #
 277 ###############################################################################
 278 # 2 - Bug fixes
 279   - Bug concerning the usage "tasUseFinalCapacitance" introduced in 3.1p5 fixed.
 280
 281 ###############################################################################
 282 # AvtTools version 3.1p5 Release Notes
 283 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 284 # Aug 24th, 2007
 285 #
 286 ###############################################################################
 287
 288 # 1 - New functionalities
 289   - Standard header information automatically added at start of all reports.
 290   - User can specify a .avt_shellrc file in home directory which is run
 291     automatically at the start of an avt_shell script.
 292   - New setting "tasPathCapacitanceDepth" which, is set to a non-zero values
 293     controls across how many transistor the out of path capacitance should
 294     be counted.
 295   - Spicedeck generation can now handle certain types of timing loop.
 296   - New setting "cpePrechargedMemsym" which tells HiTAS that symmetric memory
 297     nodes should be considered to have been precharged for the generation of
 298     Spicedeck stimuli for memory read.
 299   - File compression can now be selectively disabled using the setting
 300     "avtDisableCompression" which is a space separated list of filenames.
 301   - Spicedeck generation can now identify the conditions for writing to
 302     a symmetric memory.
 303
 304 # 2 - Bug fixes
 305   - Fixed discrepancy with Spice where HiTAS used GEOMOD to calculate diffusion
 306     size when these parameters are set to zero in a netlist.
 307   - Fixed discrepancy with Spice where HiTAS could use a model inside a subckt
 308     to characterize a transistor even if the transistor was not described as an
 309     instance.
 310   - Device names containing only Spice device card are now accepted by HiTAS.
 311   - Fixed potential fatal error during crosstalk analysis of circuits without
 312     any clock.
 313   - Fixed potential undefined behaviour when calculating the slope for a very
 314     large resistance.
 315
 316 ###############################################################################
 317 # AvtTools version 3.1p4 Release Notes
 318 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 319 # Aug 2nd, 2007
 320 #
 321 ###############################################################################
 322
 323 # 1 - New functionalities
 324   - New TCL function "inf_DefineStrictSetup" to specify a strict verification
 325     mode for a given latch. Setup is check with respect to the opening clock
 326     edge and hold with respect to the closing edge.
 327   - New TCL function "sim_ReadMeasure" which allows extraction of a delay
 328     or slope measurement from the results file of a spice simulation.
 329   - The setting "yagSetResetDetection" has a new option "remove" which will
 330     disable all set/reset inputs for all latches except RS bistables.
 331   - New TCL function inf_DefineMemsym which sets a pair of signals to be a
 332     symmetric memory so long as there is a loop between the two signals.
 333   - Enhanced modeling of overshoot discharge in conflictual current paths.
 334   - Enhanced modeling of gate delay and slope when driving huge RC networks.
 335
 336 # 2 - Bug fixes
 337   - Fixed fatal error in CPE when extracting Spicedeck of unusual symmetric
 338     memory configurations.
 339   - V cards on internal connectors of a hierarchical netlist now handled
 340     in HiTAS hierarchical mode.
 341   - intelligent handling of XOR structures at a circuit interface.
 342
 343 # 3 - Configuration Changes
 344   - New configuration variable "yagMemsymHeuristic", defaults to no. When set
 345     to yes, always eliminates current paths connecting two symmetric memories,
 346     which was previous behavior.
 347   - The setting "yagMemsymLatch" has been removed, behavior is as if this was
 348     set to yes.
 349   - The TCL function "ttv_SimulatePathDetail" is deprecated and is replaced by
 350     the new function "ttv_SimulatePath" which takes a timing path.
 351   - New configuration variable "yagStuckLatch". When set to "yes" (the default)
 352     latches are considered to be stuck if all data inputs are stuck even if
 353     the clock inputs are not stuck.
 354
 355 ###############################################################################
 356 # AvtTools version 3.1p3 Release Notes
 357 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 358 # Jul 25th, 2007
 359 #
 360 ###############################################################################
 361
 362 # 1 - New functionalities
 363   - New TCL function "inf_DefineTransparent" which allows user to specify that a
 364     latch can be transparent so that paths crossing the latch are reported.
 365   - The "set_false_path" command can now be used for access paths.
 366   - Slack report for clock gating checks now display all data origins instead
 367     of just the worst.
 368   - Optional precision warning message, activated by "stmPrecisionWarning",
 369     during delay calculation when an input slope is more than a given multiple
 370     of the gate delay. Multiple given by "stmPrecisionThreshold" (default 10).
 371   - The "ttv_ProbeDelay" function now supports use of wildcards
 372   - Possibility to generate a mini crosstalk report after each iteration in
 373     crosstalk analysis. Enabled by setting "stbCtkMaxReportedSignals" greater
 374     than zero, this value sets the number of slacks/delays/scores to report.
 375   - New TCL function "inf_DefineSwitchingProbability" to define a switching
 376     probability for a signal used during crosstalk analysis to filter
 377     improbable aggression.
 378   - Possibility to use explicit time/capacitance units in TCL functions.
 379
 380 # 2 - Bug fixes
 381   - Clock latency is now displayed in slack report when user specified by
 382     "set_clock_latency".
 383   - INF or SDC directives affecting database generation can now use any of
 384     the possible names when referring to a node in a hierarchical netlist.
 385   - Filter directives could sometimes eliminate valid paths.
 386   - CPE can now correctly handle looped structures such as RS and clock
 387     generators.
 388   - CPE can now handle a write to a symmetric memory.
 389   - The setting "avtParasiticCacheSize = 0" now works from a TCL script.
 390   - The observable mode of crosstalk analysis now filters correctly.
 391   - Fixed bug preventing timing checks for directives between two data
 392     signals.
 393   - Configuration "avtSpiTp/TnModelName" now works from a TCL script.
 394
 395 # 3 - Configuration Changes
 396   - Crosstalk analysis is set to observable mode by default.
 397
 398
 399 ###############################################################################
 400 # AvtTools version 3.1p2 Release Notes
 401 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 402 # Jun 21st, 2007
 403 #
 404 ###############################################################################
 405
 406 # 1 - New functionalities
 407   - Clock gating checks are performed between the inputs of the gate at which
 408     the convergence occurs.
 409   - Any of the possible hierarchical names can be set for "set_case_analysis"
 410     constraints in a hierarchical netlist.
 411   - Display both HZ and non-HZ slacks for a precharge node instead of just the
 412     worst.
 413   - Possibility to specify HZ transition in path or slack report request by
 414     suffixing the character 'Z' or '/' to the direction specification.
 415   - Path search can now take into account that latches or precharges of
 416     identical phase are transparent.
 417   - New option to allow propagation of a slack error on a precharge to the
 418     latch at the end of a domino precharge chain in order to obtain slack
 419     error margin at this latch. Set "avtTransparentPrecharge" to "unfiltered".
 420   - Possibility to specify the "through latch" in a slack report request.
 421   - Marking a latch using FCL no longer automatically blocks current paths
 422     through the latch unless the "BLOCKER" directive is added.
 423
 424 # 2 - Bug fixes
 425   - Possibility of wrong evaluation of expressions in the flattening process.
 426   - Critical path search through precharge nodes ("avtTransparentPrecharge")
 427     could return incorrect path.
 428   - Missing "through" node in slack corresponding to unclocked precharge
 429     evaluation.
 430
 431 ###############################################################################
 432 # AvtTools version 3.1p1 Release Notes
 433 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 434 # Jun 11th, 2007
 435 #
 436 ###############################################################################
 437
 438 # 1 - New functionalities
 439   - inf_DefinePathDelayMargin now affects .lib values.
 440   - New option "pathcomp" for ttv_ConnectorToLatchReport.
 441   - Handling of '\' and '\\' in spice parser.
 442
 443 # 2 - Bug fixes
 444   - Better handling of stuck inputs in CPE.
 445   - ttv_ProbeDelay now can take net names.
 446   - Handling of mixed BSIM levels.
 447   - Wrong equivalent capacitance value computed when loading timing database in CPE.
 448
 449 ###############################################################################
 450 # AvtTools version 3.1 Release Notes
 451 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 452 # May 30th, 2007
 453 #
 454 ###############################################################################
 455
 456 # 1 - New functionalities
 457   - Handling of .FUNC in spice parser.
 458   - New functions added in spice parser:
 459       sgn(a)
 460       sign(a,b)
 461       pow(a,b)
 462       pwr(a,b)
 463       e(a,b)
 464       limit(a,b)
 465       agauss(a,b,c)
 466       symdistr(a,b,c)
 467       asymdistr(a,b,c,d)
 468       skewcor(a,b,c,d)
 469       distr(a,b,c,d)
 470   - Clock detection in 'tma_Abstract' when behavioral figure exists.
 471   - Explicit mention of added/removed cycles in slack report in case of multicycle path.
 472   - Better handling of syntax/errors in SPEF parser.
 473   - Precharge transparancy. Activated by setting "avtTransparentPrecharge" to "yes".
 474   - Asynchronous commands detection by setting "yagSetResetDetection" to "yes".
 475
 476 # 2 - Bug fixes
 477   - Binary avt_shell in 32 bits can now generate reports > 2GB.
 478   - 'ttv_DisplayPathDetail' crashed when NULL path given.
 479   - Incoherent results when annotation coupling capacitances in DSPF.
 480   - Missing slacks between stb and .sto parse.
 481   - Slack report crashed when CKLATCH section in INF file existed.
 482   - Handling name issue in avttools.conf
 483   - Unsupported operator '!=' in spice equations.
 484   - Bad implementation of mobility parameters in BSIM4.5
 485   - .include order issue in spice parser.
 486   - Disable gate delay not working with "avtVectorize" set to "yes".
 487   - Bad implementation of Vsat calculation when 'tempmod' parameter was set to '1'.
 488
 489 # 3 - Configuration changes
 490   - The setting "tmaDetectClock" is no longer supported.
 491
 492 # 4 - Distribution changes
 493   - RedHat Enterprise Linux 4.0 supported, using binaries for 3.0.
 494   - Solaris 10 supported, using binaries for Solaris 9.
 495
 496 ###############################################################################
 497 # AvtTools version 3.0p5 Release Notes
 498 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 499 # March 14th, 2007
 500 #
 501 ###############################################################################
 502
 503 # 1 - New functionalities
 504   - New standard TCL API to load complete crosstalk results database.
 505   - The SPEF parser no longer causes abort in cases of missing devices.
 506   - SPEF parser now accepts all legal SPEF syntax.
 507
 508 # 2 - Bug fixes
 509   - Scaling error when counting RC delay internal to a cone such as before
 510     a transfer gate.
 511   - Incomplete criteria for choosing to calculate RC delays internal to cones.
 512   - 32bit avt_shell could not create user report files larger than 2GB.
 513   - Fixed fatal error in TCL function "ttv_DisplayPathDetail" when given a
 514     NULL path.
 515   - Fixed issue of missing coupling capacitance from DSPF depending on net
 516     declaration order.
 517   - Fixed incorrect DSPF parasitic connections in case of missing *|S.
 518   - Fixed issue of potential optimism in fall transition for transfer
 519     gate command delay when using avtNewSwitchModel.
 520   - Fixed issue where CKLATCH caused connectors to be clocks for STA.
 521
 522 ###############################################################################
 523 # AvtTools version 3.0p4 Release Notes
 524 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 525 # February 21st, 2007
 526 #
 527 ###############################################################################
 528
 529 # 1 - New functionalities
 530   - Spice parser support for user-defined functions.
 531   - New standard TCL scripts showing individual gate simulation and custom
 532     slack report generation.
 533   - Precision characterisation mode using propagated slope values, activated
 534     by setting "tmaCharacPrecision" to "yes".
 535   - Annotation of passive devices (resistors, capacitors, diodes) now permitted
 536     by SPEF parser by setting "avtAnnotationPreserveExistingParasitics" to "yes"
 537   - Stability analysis now takes full account of false path and false slack
 538     settings. This allows false DATA LAG reports to be removed. This
 539     functionality is activated by setting "stbStabilityCorrection" to "yes"
 540   - Custom configuration of device connector names for DSPF and SPEF parasitic
 541     annotation to handle outputs of any extractor. See documentation of
 542     "avtAnnotationDeviceConnectorSetting" for details.
 543   - TYPE property of timing path detail now gives precise gate type if known.
 544   - Optmisation of regular expression handling.
 545
 546 # 2 - Bug fixes
 547   - More robust parasitic annotation for DSPF and SPEF formats. Node connections
 548     are fully determinist and corected an issue where a parasitic file could
 549     open circuit a connection existing in the device netlist.
 550   - "inf_DisableTimingArc" will now give a warning if the specified names do
 551     not exist.
 552   - Issue of XTAS process remaining on license checkout failure, unusable but
 553     using CPU.
 554   - CPE issue where initial conditions not set for non-dual CMOS gates.
 555   - CPE issue where results not read due to measure label mismatch in case of
 556     bussed signals
 557   - Total net capacitance in DSPF file is now calculated properly in case of
 558     crosstalk capacitance.
 559   - Corrected issue of total capacitance update if the crosstalk capacitance
 560     is specified by an expression.
 561   - Corrected issue in "avtSpiKeepCards" "capacitance" setting which behaved
 562     the exect opposite to the setting.
 563   - Intrinsic charge calculation bug for BSIM3 CAPMOD=0 technology files.
 564   - Convergence issue calculating branch current, could result in reduced
 565     precision for transfer gates.
 566   - Corrected issue in "LoadSwitchingWindows" where incorrect slack could be
 567     reported due to incomplete connecter stability in ".STO" file.
 568   - Corrected issue in "LoadSwitchingWindows" in case of missing clock
 569     specification for multi-clock latches.
 570   - Corrected issue of missing clock path detail in case of precharge with
 571     no direct clocking of precharge or evaluation phase.
 572   - Corrected issue of nonsensical display of data required in slack report
 573     in case of combinational circuits.
 574   - Missing property for "THRU" latch in slack object.
 575   - Corrected handling issue of new BSIM4.5 transistor instance specific
 576     parameters.
 577   - Correct handling of net name in DSPF interpreted as spice.
 578   - Corrected issue in setting Vcard on pin logically connected to another
 579     external pin.
 580   - Corrected issue of very strange delay results in some cases when using
 581     avtNewSwitchModel
 582   - Corrected issue in which variable avtNewSwitchModel had to be present
 583     for script recalculating delays in order to be taken into account even
 584     though UTD was built using avtNewSwitchModel
 585
 586 # 3 - Distribution changes
 587   - RedHat Linux 8.0 is no longer supported.
 588
 589 ###############################################################################
 590 # AvtTools version 3.0p3 Release Notes
 591 # Copyright (c) 1998-2007, AVERTEC All Rights Reserved
 592 # February 1st, 2007
 593 #
 594 ###############################################################################
 595
 596 # 1 - New functionalities
 597   - Support for crosstalk capacitances in DSPF parser.
 598   - Better effective gate-drain capacitance modeling.
 599   - Improvement in local crosstalk effect.
 600   - BSIM 4.5 partial support (well proximity effects not yet supported).
 601
 602 # 2 - Bug fixes
 603   - In .LIB driver clock related output pins necessarily have an access
 604     timing arc.
 605   - Correct phase and domain handling for user-defined timing directives and
 606     clock gating checks.
 607   - Bug in BSIM VERSION handling in 4.4 technology files
 608   - Delay recalculation issue in symmetric memory cells
 609
 610 ###############################################################################
 611 # AvtTools version 3.0p2 Release Notes
 612 # Copyright (c) 1998-2006, AVERTEC All Rights Reserved
 613 # January 22nd, 2007
 614 #
 615 ###############################################################################
 616
 617 # 1 - New functionalities
 618   - New TCL command inf_DefineFalseSlack to remove false slack errors.
 619   - User defined directives to specify clock filtering of data signals.
 620   - Handling of symmetrical bitcells as 2 latches with setting of
 621     yagMemsymLatch to yes.
 622
 623 # 2 - Bug fixes
 624   - Incorrect intrinsic setup in slack report.
 625   - Fatal error if netlist contains transistors identical apart from SA/SB.
 626   - INF marking of unused transistors.
 627   - Automatic clock gating not applied to stuck nets.
 628   - Voltage initialisation bug in NewSwitchModel.
 629   - Impossible convergence in NewSwitchModel for very low supply voltages.
 630   - set_false_paths now affects paths ending on high impedance state such
 631     as precharge nodes
 632   - More robust regular expression handling
 633
 634 # 3 - Distribution changes
 635   - FlexLM updated to v10.8.5.0 to correct automatic heartbeat issue with
 636     64bit Linux.
 637   - Solaris 2.6 is no longer supported.
 638
 639 ###############################################################################
 640 # AvtTools version 3.0p1 Release Notes
 641 # Copyright (c) 1998-2006, AVERTEC All Rights Reserved
 642 # December 20th, 2006
 643 #
 644 ###############################################################################
 645
 646 # 1 - New functionalities
 647   - Handling of conditional "a ? b : c" and "int" operators in technology file.
 648   - Handling of user parameters in transistor instance.
 649
 650 # 2 - Bug fixes
 651   - Fixed bug when *|NET within .subckt in spice netlist.
 652   - Input slope in spicedeck when the first timing arc is a parasitic
 653     was incorrect.
 654   - Use of unknown property caused a fatal error after warning message.
 655
 656 ###############################################################################
 657 # AvtTools version 3.0 Release Notes
 658 # Copyright (c) 1998-2006, AVERTEC All Rights Reserved
 659 # November 20th, 2006
 660 #
 661 ###############################################################################
 662
 663 # 1 - New functionalities
 664   - Arithmetic on propagated clocks. Using the SDC directive
 665     "create_generated_clock" it is possible to specify clock
 666     multipliers/dividers, duty cycle changes, inversion and
 667     edge_shifting.
 668   - User defined Setup/Hold timing checks between any two
 669     data or clock signals.
 670   - Automatic detection of clock gating check points.
 671   - Timing reports contain more detail on type of gate if it
 672     is a standard CMOS gate.
 673   - New API function "ttv_DumpHeader" to create a standard header
 674     for timing reports.
 675   - Support for auto-loading of TCL functions defined in the
 676     distribution TCL directory.
 677   - Reports of number of warnings/errors at the end of execution
 678     of any script.
 679   - Parasitic annotation on diodes and capacitances.
 680   - Support of spice .connect directive to connect circuit nodes.
 681   - Full error message documentation.
 682   - Full support of virtual clocks in data departure/arrival
 683     specifiations.
 684   - Support for spice voltage sources with one level of hierarchy.
 685   - Improved modeling of gate output overshoot.
 686   - Modeling of local crosstalk effect between input and output
 687     of a gate.
 688   - Improved modeling of effective gate input capacitance.
 689   - Better fitting of transistor characteristics for advanced
 690     technologies.
 691   - Improved modeling of current in series connected transistors
 692     simultaneously switching due to a common input.
 693
 694 # 2 - Bug fixes
 695   - Improved license management stability.
 696   - Incorrect master/slave latch markings in case of toggle or
 697     cascaded flip-flops.
 698   - "set_case_analysis" timing constraints are now propagated
 699     through latches. A latch is considered stuck if the data
 700     is stuck.
 701   - The timing path characterisation function "ttv_CharacPaths"
 702     now generates coherent path detail reports.
 703   - Slew and Load axes for characterisation can now be specified
 704     per timing figure before loading of the figure.
 705   - avt_shell no longer blocks when started in the background.
 706   - Fixed false transistor characterisation warnings for stuck
 707     nodes.
 708   - Handling of comments in SPEF parser.
 709   - Fatal error in case of illegal false path directives.
 710   - Directive "set_false_path" no longer requires "from" and "to"
 711     if "through" is specified.
 712   - Failure of "set_case_analysis" directive when used to specify
 713     a particular transition on a bussed signal.
 714
 715 # 3 - Configuration changes
 716   - The setting "tasGenerateDetailTimingFile" is no longer supported.
 717     The detailed timing file is now always generated, equivalent to
 718     the "yes" setting.
 719   - The setting "tasExitAfterDetailTimingFile" now defaults to "yes".
 720     The timing path file can be optionally generated by setting this
 721     variable to "no"
 722   - The setting "yagAutomaticLatchDetection now defaults to "yes".
 723   - The setting "yagDetectBistable" is no longer supported. Use the
 724     setting "yagAutomaticRSDetection" instead. This variable defaults
 725     to yes but requires "yagAutomaticLatchDetection=yes". By default
 726     RS bistables are recognised but not treated as latches. This
 727     behaviour can be customised using "yagAutomaticRSDetection".
 728   - The settings "tmaTtxInput", "tmaTtxInput", "tmaTtxInput" are
 729     no longer supported. The API tma_Abstract automatically uses
 730     whatever form of the timing figure has been loaded. If both
 731     path and detail are loaded, then the detail is used.
 732   - The settings "avtAnnotationKeepM" and "avtAnnotationKeepX" are
 733     obsolete. They are replaced by the more general setting
 734     "avtAnnotationKeepCards"
 735   - Clocks automatically "Equivalent" if they  are generated from
 736     the same source clock and have the same period.
 737