distrib/share/gns_templates/column_and_sel.vhd

   1 --
   2 -- Template column_and_sel
   3 -- Recognition rule
   4 --
   5 entity column_and_sel is
   6    generic  ( capacity              : integer);
   7    port     ( q, nq                 : inout mux_bit bus;
   8               com                   : in    bit_vector(capacity-1 downto 0);
   9               ck                    : in    bit;
  10               sel                   : in    bit;
  11               vdd, vss              : in    bit);
  12    -- pragma symmetric q nq
  13    -- pragma symmetric com
  14 end;
  15
  16 architecture structural of column_and_sel is
  17     component column
  18        generic  ( capacity          : integer);
  19        port     ( q, nq             : inout mux_bit bus;
  20                   com               : in    bit_vector(capacity-1 downto 0);
  21                   vdd, vss          : in    bit);
  22     end component;
  23
  24     component TN
  25        port     ( gate              : in    bit;
  26                   source, drain     : inout bit;
  27                   bulk              : in    bit);
  28     end component;
  29
  30     signal a, na, PCsig             : bit;
  31
  32 begin
  33
  34     col : column
  35         generic map(capacity)
  36         port map (a     ,na     ,com    ,vdd    ,vss);
  37
  38     -- pass transistors
  39     t1 : TN port map (sel       ,a      ,q      ,vss);
  40     t2 : TN port map (sel       ,na     ,nq     ,vss);
  41
  42     precharge_t1 : TN port map (ck, na, vdd, vss);
  43     precharge_t2 : TN port map (ck, a, vdd, vss);
  44     precharge_t3 : TN port map (ck, a, na, vss);
  45
  46 end;