Initial version of donated sources by Avertec, 3.4p5.
[tas-yagle.git] / distrib / share / gns_templates / column_xn.vhd
1 --
2 -- Template column_xn
3 -- Recognition rule
4 --
5 -- capacity is the number of mem_cell composing column
6 -- width is the number of column composing column_xn
7 --
8 --
9 entity column_xn is
10 generic ( size, width : integer);
11 port ( com : in bit_vector(size-1 downto 0);
12 q, nq : inout mux_vector(width-1 downto 0) bus;
13 vdd,gnd : in bit);
14 -- pragma symmetric com
15 -- pragma symmetric q(i) nq(i)
16 end;
17
18 architecture structural of column_xn is
19 component column
20 generic ( capacity : integer);
21 port ( q, nq : inout mux_bit bus;
22 com : in bit_vector(capacity-1 downto 0);
23 vdd, gnd : in bit);
24 end component;
25
26 begin
27 loop: for i in width-1 downto 0 generate
28 column_n : column
29 generic map (size)
30 port map (q(i) ,nq(i) ,com ,vdd ,gnd);
31 end generate;
32
33 end;