Initial version of donated sources by Avertec, 3.4p5.
[tas-yagle.git] / distrib / share / tcl / sdc1.2.tcl
1 ################################################################################
2 # > COPYRIGHT NOTICE <
3 #
4 # Copyright 2000 (c) Synopsys.
5 #
6 #
7 ################################################################################
8 #
9 # Title : SDC-parser commands declaration for SDC version 1.2
10 #
11 # Project : SDC-parser
12 #
13 # Authors : A.Gratchev
14 # A.Sokhatski
15 # Intrinsix Corp.
16 # anso@intrinsix.com
17 #
18 ################################################################################
19
20
21 declare all_clocks {
22 }
23
24 declare all_inputs {
25 {-level_sensitive Flag }
26 {-edge_triggered Flag }
27 {-clock List }
28 } {!(param(-level_sensitive) && param(-edge_triggered))}
29
30 declare all_outputs {
31 {-level_sensitive Flag }
32 {-edge_triggered Flag }
33 {-clock List }
34 } {!(param(-level_sensitive) && param(-edge_triggered))}
35
36 declare create_clock {
37 {-period Float {$par>=0}}
38 {-name String }
39 {-waveform List {type_Float {length($length>=2 && ($length % 2)==0)} } }
40 {port_pin_list List }
41 } {param(-period) && (param(-name) || param(port_pin_list))}
42
43 declare current_design {
44 }
45
46 declare current_instance {
47 {-instance String }
48 }
49
50 declare get_cells {
51 {-of_objects List }
52 {patterns List }
53 {-hierarchical Flag }
54 {-hsc Enum {{/} {@} {^} {#} {.} {|}}}
55 } {(param(patterns) && !param(-of_objects)) || \
56 (param(-of_objects) && !param(patterns))}
57 # && !param(-hierarchical))}
58
59 declare get_clocks {
60 {patterns List }
61 } {param(patterns)}
62
63 declare get_lib_cells {
64 {patterns List }
65 {-hsc Enum {{/} {@} {^} {#} {.} {|}}}
66 } {param(patterns)}
67
68 declare get_lib_pins {
69 {patterns List }
70 {-hsc Enum {{/} {@} {^} {#} {.} {|}}}
71 } {param(patterns)}
72
73 declare get_libs {
74 {patterns List }
75 } {param(patterns)}
76
77 declare get_nets {
78 {patterns List }
79 {-hierarchical Flag }
80 {-hsc Enum {{/} {@} {^} {#} {.} {|}}}
81 } {param(patterns)}
82
83 declare get_pins {
84 {patterns List }
85 {-hierarchical Flag }
86 {-hsc Enum {{/} {@} {^} {#} {.} {|}}}
87 } {param(patterns)}
88
89 declare get_ports {
90 {patterns List }
91 } {param(patterns)}
92
93 declare set_case_analysis {
94 {value Enum {0 1 rising falling zero one rise fall}}
95 {port_pin_list List }
96 } {param(value) && param(port_pin_list)}
97
98 declare set_clock_gating_check {
99 {-setup Float {$par>=0}}
100 {-hold Float {$par>=0}}
101 {-rise Flag }
102 {-fall Flag }
103 {-high Flag }
104 {-low Flag }
105 {object_list List }
106 } {(param(-setup) || param(-hold) || param(-high) || param(-low)) && \
107 !(param(-high) && param(-low))}
108
109 declare set_clock_latency {
110 {delay Float {1}}
111 {object_list List }
112 {-rise Flag }
113 {-fall Flag }
114 {-min Flag }
115 {-max Flag }
116 {-source Flag }
117 {-early Flag }
118 {-late Flag }
119 } {param(delay) && param(object_list)}
120
121 declare set_clock_transition {
122 {transition Float {1}}
123 {clock_list List }
124 {-rise Flag }
125 {-fall Flag }
126 {-min Flag }
127 {-max Flag }
128 } {param(transition) && param(clock_list) && \
129 !(param(-rise) && param(-fall))}
130
131 declare set_clock_uncertainty {
132 {uncertainty Float {1}}
133 {-from List }
134 {-to List }
135 {-rise Flag }
136 {-fall Flag }
137 {-setup Flag }
138 {-hold Flag }
139 {object_list List }
140 } {param(uncertainty) && !(param(object_list) && (param(-from) || param(-to)))}
141
142 declare set_disable_timing {
143 {object_list List }
144 {-from String }
145 {-to String }
146 } {param(object_list) && \
147 !(param(-to) ^ param(-from))}
148
149 declare set_drive {
150 {resistance Float {$par>=0}}
151 {port_list List }
152 {-rise Flag }
153 {-fall Flag }
154 {-min Flag }
155 {-max Flag }
156 } {param(resistance) && param(port_list)}
157
158 declare set_driving_cell {
159 {-lib_cell String }
160 {-rise Flag }
161 {-fall Flag }
162 {-library String }
163 {-pin String }
164 {-from_pin String }
165 {-multiply_by Float {$par>=0}}
166 {-dont_scale Flag }
167 {-no_design_rule Flag }
168 {-input_transition_rise Float {$par>=0}}
169 {-input_transition_fall Float {$par>=0}}
170 {port_list List }
171 } {param(port_list)}
172
173 declare set_false_path {
174 {-setup Flag }
175 {-hold Flag }
176 {-rise Flag }
177 {-fall Flag }
178 {-from List }
179 {-to List }
180 {-through List {dup}}
181 } {(param(-from) || param(-to) || param(-through)) && \
182 !(param(-rise) && param(-fall)) && !(param(-setup) && param(-hold))}
183
184 declare set_fanout_load {
185 {value Float {$par>=0}}
186 {port_list List }
187 } {param(value) && param(port_list)}
188
189 declare set_hierarchy_separator {
190 {hchar Enum {{/} {@} {^} {#} {.} {|}}}
191 } {param(hchar)}
192
193 declare set_input_delay {
194 {-clock List }
195 {-clock_fall Flag }
196 {-level_sensitive Flag }
197 {-rise Flag }
198 {-fall Flag }
199 {-min Flag }
200 {-max Flag }
201 {-add_delay Flag }
202 {delay_value Float {1}}
203 {port_pin_list List }
204 } {param(delay_value) && param(port_pin_list) && \
205 !((param(-clock_fall) || param(-level_sensitive)) && !param(-clock))}
206
207 declare set_input_transition {
208 {-rise Flag }
209 {-fall Flag }
210 {-min Flag }
211 {-max Flag }
212 {transition Float {$par>=0}}
213 {port_list List }
214 } {param(transition) && param(port_list)}
215
216 declare set_load {
217 {-min Flag }
218 {-max Flag }
219 {-substract_pin_load Flag }
220 {-pin_load Flag }
221 {-wire_load Flag }
222 {value Float {$par>=0}}
223 {objects List }
224 } {param(value) && param(objects)}
225
226 declare set_logic_dc {
227 {port_list List }
228 } {param(port_list)}
229
230 declare set_logic_one {
231 {port_list List }
232 } {param(port_list)}
233
234 declare set_logic_zero {
235 {port_list List }
236 } {param(port_list)}
237
238 declare set_max_area {
239 {area_value Float {$par>=0}}
240 } {param(area_value)}
241
242 declare set_max_capacitance {
243 {capacitance_value Float {$par>=0}}
244 {object_list List }
245 } {param(capacitance_value) && param(object_list)}
246
247 declare set_max_delay {
248 {delay_value Float {1}}
249 {-rise Flag }
250 {-fall Flag }
251 {-from List }
252 {-to List }
253 {-through List {dup}}
254 } {param(delay_value) && \
255 !(param(-rise) && param(-fall))}
256
257 declare set_max_fanout {
258 {fanout_value Float {$par>=0}}
259 {object_list List }
260 } {param(fanout_value) && param(object_list)}
261
262 declare set_max_time_borrow {
263 {delay_value Float {$par>=0}}
264 {object_list List }
265 } {param(delay_value) && param(object_list)}
266
267 declare set_max_transition {
268 {transition_value Float {$par>=0}}
269 {object_list List }
270 } {param(transition_value) && param(object_list)}
271
272 declare set_min_capacitance {
273 {capacitance_value Float {$par>=0}}
274 {object_list List }
275 } {param(capacitance_value) && param(object_list)}
276
277 declare set_min_delay {
278 {delay_value Float {1}}
279 {-rise Flag }
280 {-fall Flag }
281 {-from List }
282 {-to List }
283 {-through List {dup}}
284 } {param(delay_value) && \
285 !(param(-rise) && param(-fall))}
286
287 declare set_multicycle_path {
288 {path_multiplier Int {1}}
289 {-setup Flag }
290 {-hold Flag }
291 {-rise Flag }
292 {-fall Flag }
293 {-start Flag }
294 {-end Flag }
295 {-from List }
296 {-to List }
297 {-through List {dup}}
298 } {param(path_multiplier)}
299
300 declare set_operating_conditions {
301 {-analysis_type Enum {single bc_wc on_chip_variation}}
302 {-library List }
303 {-max String }
304 {-min String }
305 {-max_library List }
306 {-min_library List }
307 {condition String }
308 }
309
310 declare set_output_delay {
311 {-clock List }
312 {-clock_fall Flag }
313 {-level_sensitive Flag }
314 {-rise Flag }
315 {-fall Flag }
316 {-min Flag }
317 {-max Flag }
318 {-add_delay Flag }
319 {delay_value Float {1}}
320 {port_pin_list List }
321 } {param(delay_value) && param(port_pin_list) && \
322 !((param(-clock_fall) || param(-level_sensitive)) && !param(-clock))}
323
324 declare set_port_fanout_number {
325 {fanout_number Int {($par>=0) && ($par<=100000)}}
326 {port_list List }
327 } {param(fanout_number) && param(port_list)}
328
329 declare set_propagated_clock {
330 {object_list List }
331 } {param(object_list)}
332
333 declare set_resistance {
334 {value Float {$par>=0}}
335 {net_list List }
336 {-min Flag }
337 {-max Flag }
338 } {param(value) && param(net_list)}
339
340 declare set_wire_load_min_block_size {
341 {size Float {$par>=0}}
342 } {param(size)}
343
344 declare set_wire_load_mode {
345 {mode_name Enum {top enclosed segmented}}
346 } {param(mode_name)}
347
348 declare set_wire_load_model {
349 {-name String }
350 {-library List }
351 {-min Flag }
352 {-max Flag }
353 {object_list List }
354 } {param(-name)}
355
356 declare set_wire_load_selection_group {
357 {-group_name String }
358 {-library List }
359 {-min Flag }
360 {-max Flag }
361 {object_list List }
362 } {param(-name)}
363
364 # register_new_type EdgeList {
365 # if {[sdc::check_type List $value]} {
366 # if {[expr {[llength $value] % 2}] || [llength $value]==0} {
367 # return 0
368 # }
369 #
370 # set startvalue -0.1
371 #
372 # foreach parv $value {
373 # if {[catch {expr {$parv + 1}}]} {
374 # return 0
375 # }
376 # if {$parv<=$startvalue} {
377 # return 0
378 # }
379 # set startvalue $parv
380 # }
381 #
382 # return 1
383 # } else {
384 # return 0
385 # }
386 # }