distrib/share/tutorials/hitas/clock_gating/circuit.spi

   1
   2 .temp 60
   3
   4 .include "dc.spi"
   5 .include "cells.spi"
   6
   7 .subckt circuit D1 D2 EN1 EN2 EN3 CK OUT vdd vss
   8 xclk1i CK ck_1 vdd vss inv
   9 xclk2i ck_1 ck_2 vdd vss inv
  10 xi3 EN1 sig1 vdd vss inv
  11 xi4 EN2 sig2 vdd vss inv
  12 xi5 EN3 sig3 vdd vss inv
  13 xnand3 sig1 sig2 ck_2 nand3out vdd vss nand3
  14 xnor1 sig3 nand3out nor2out vdd vss nor
  15 xi7 nand3out sig6 vdd vss inv
  16
  17 xi8 D2 ff1_input vdd vss inv
  18 xff1 ff1_input ff1_out sig6 vdd vss flipflop
  19 xnor2 ff1_out D1 sig7 vdd vss nor
  20 xi9 sig7 sig7_1 vdd vss inv
  21 xi10 sig7_1 sig7_2 vdd vss inv
  22 xi11 sig7_2 ff2_input vdd vss inv w=1u
  23
  24 xff2 ff2_input ff2_out nor2out vdd vss flipflop
  25
  26 xi12 ff2_out OUT vdd vss inv
  27 .ends