Initial version of donated sources by Avertec, 3.4p5.
[tas-yagle.git] / distrib / share / tutorials / hitas / other_examples / hierarchy / run.tcl
1 #!/usr/bin/env avt_shell
2
3 #############################################################
4 # Timing Database Generation #
5 #############################################################
6
7 # Global Configuration
8 avt_config avtVddName "vdd*"
9 avt_config avtVssName "vss*"
10
11 # Technology Parameters
12
13 avt_LoadFile ../../techno/bsim4_dummy.hsp spice
14 avt_LoadFile m11.spi spice
15 avt_LoadFile m12.spi spice
16 avt_LoadFile m22.spi spice
17 avt_LoadFile m21.spi spice
18 avt_LoadFile m31.spi spice
19
20 hitas m11
21 hitas m12
22 hitas m22
23
24 avt_config tasHierarchicalMode yes
25
26 hitas m21
27 hitas m31
28
29 # Static Timing Analysis
30
31 inf_SetFigureName m31
32
33 create_clock -period 3000 -waveform {0 1500} ck
34
35 set_input_delay -clock ck -clock_fall -min 400 *
36 set_input_delay -clock ck -clock_fall -max 600 *
37
38 inf_Drive m31