Initial version of donated sources by Avertec, 3.4p5.
[tas-yagle.git] / distrib / sources / api / inf / inf_API.h
1 #include "avt_API_types.h"
2
3 /* ================================================================== */
4 /* GENERAL */
5 /* ================================================================== */
6
7 /*------------------
8 MAN inf_SetFigureName
9 CATEG tcl+general
10 DESCRIPTION
11 Sets the target figure on which to apply the INF functions
12 ARGS
13 name % Name of the target figure
14 EXAMPLE % {inf_SetFigureName cpu}
15 */
16 void inf_SetFigureName(char *name);
17
18 /*------------------
19 MAN inf_AddFile
20 CATEG tcl+general
21 DESCRIPTION
22 Loads an INF file and applies included statements on a figure (this function does not invoke {inf_SetFigureName}).
23 ARGS
24 filename % INF file to load
25 figname % Figure on which to apply INF statements. Those statements will be added to the ones that my be already present.
26 EXAMPLE % {inf_AddFile cpu.inf cpu}
27 */
28 void inf_AddFile(char *filename, char *figname);
29
30 /*------------------
31 MAN inf_Drive
32 CATEG tcl+general
33 DESCRIPTION
34 Saves applied INF statements on disk
35 ARGS
36 outputname % File where to save INF statements (the {.inf} suffix is not automatically added)
37 EXAMPLE % {inf_Drive cpu.inf}
38 */
39 void inf_Drive(char *outputname);
40
41 /*------------------
42 MAN inf_ExportSections
43 CATEG tcl+general
44 DESCRIPTION
45 Saves on disk applied INF statements related to specific INF sections
46 ARGS
47 outputname % File where to save INF statements
48 section % {OperatingCondition}, {PinSlew}, {Rename}, {Stop}, {Sensitive}, {Suppress}, {Inputs}, {NotLatch}, {CkLatch}, {Ckprech}, {Precharge}, {Dirout}, {Mutex}, {CrosstalkMutex}, {Constraint}, {ConnectorDirections}, {PathIN}, {PathOUT}, {PathDelayMargin}, {MulticyclePath}, {Ignore}, {NoCheck}, {Bypass}, {NoRising}, {NoFalling}, {Break}, {Inter}, {Asynchron}, {DoNotCross}, {Transparent}, {RC}, {NORC}, {SIGLIST}, {Falsepath}, {Delay}, {Dlatch}, {FlipFlop}, {Slopein}, {Capaout}, {OutputCapacitance}, {SwitchingProbability}, {Directives}, {Stb} and {Stuck}.
49 EXAMPLE % {inf_ExportSections cpu.inf "Dirout CrosstalkMutex"}
50 */
51 void inf_ExportSections(char *outputname, char *section);
52
53 /*------------------
54 MAN inf_CleanFigure
55 CATEG tcl+general
56 DESCRIPTION
57 Removes all INF statements on current figure
58 */
59 void inf_CleanFigure();
60
61 /* ================================================================== */
62 /* DISASSEMBLY */
63 /* ================================================================== */
64
65 /*------------------
66 MAN inf_DefineIgnore
67 CATEG tcl+netlist
68 DESCRIPTION
69 The tool ignores specified components. Equivalent to commenting out elements in a SPICE netlist.
70 ARGS
71 list % Pointer on the list of components to ignore. An component name can be a regular expression.
72 type % Supported types are {Instances}, {Transistors}, {Resistances}, {Capacitances}, {Diodes}, {Parasitics} and {SignalNames}. {Parasitics} affects only DSPF files. {SignalNames} affects only the flattening of a hierarchical netlist, by ignoring the given name if several hierarchical names are available for one net.
73 EXAMPLE % {inf_DefineIgnore Transistors *.M23*}
74 */
75 void inf_DefineIgnore(char *type, List *list);
76
77 /*------------------
78 MAN inf_DefineMutex
79 CATEG tcl+disa
80 DESCRIPTION
81 Adds mutual exclusion constraints on signals, in order to help the disassembly process. May be especially usefull when dealing with shifters or multiplexors, in case mutual exclusion constraints can not be directly derived from internal combinational circuitry (if the mutual exclusions constraints come from latched values or come from constraints on external pins).
82 ARGS
83 type % Mutual exclusion constraints, legal values for are {muxup}, {muxdn}, {cmpup} and {cmpdn} (see INF file description)
84 list % List of signals mutual exclusions constraints should be applied on
85 EXAMPLE % {inf_DefineMutex cmpup [list a_0 a_1 a_2 a_3]}
86 */
87 void inf_DefineMutex(char *type, List *list);
88
89 /*------------------
90 MAN inf_DefineInputs
91 CATEG tcl+disa
92 DESCRIPTION
93 Sets a signal as a circuit input, in order to help the disassembly process.
94 ARGS
95 name % Signal's name
96 */
97 void inf_DefineInputs(char *name);
98
99 /*------------------
100 MAN xxxinf_DefineStop
101 CATEG tcl+disa
102 DESCRIPTION
103 Sets a signal as a functional analysis stop point, in order to help the disassembly process.
104 ARGS
105 name % Signal's name
106 */
107 void inf_DefineStop(char *name);
108
109 /*------------------
110 MAN inf_DefineDirout
111 CATEG tcl+disa
112 DESCRIPTION
113 Defines the level of a signal for transistor orientation, in order to help the disassembly process.
114 ARGS
115 name % Signal's name
116 level % Signal's level; transistors are oriented (the sense of the current is) from high-level to low-level signals.
117 */
118 void inf_DefineDirout(char *name, int level);
119
120 /*------------------
121 MAN inf_DefineDLatch
122 CATEG tcl+disa
123 DESCRIPTION
124 Sets a signal as a dynamic latch. Works only if the surrounding circuitry permits a HZ state on the signal. Commands are then
125 identified automatically.
126 ARGS
127 name % Signal's name
128 */
129
130 void inf_DefineDLatch(char *name);
131
132 /*------------------
133 MAN inf_DefineNotDLatch
134 CATEG tcl+disa
135 DESCRIPTION
136 Disables a dynamic latch directive on a signal. To be used together with {yagMarkTristateMemory}
137 ARGS
138 name % Signal's name
139 */
140 void inf_DefineNotDLatch(char *name);
141
142 /*------------------
143 MAN inf_DefineNotLatch
144 CATEG tcl+disa
145 DESCRIPTION
146 Disables the identification of a latch on a signal
147 ARGS
148 name % Signal's name
149 */
150 void inf_DefineNotLatch(char *name);
151
152
153 /*------------------
154 MAN inf_DefineKeepTristateBehaviour
155 CATEG tcl+disa
156 DESCRIPTION
157 Disables the transformation of bus into register when configurations 'avtVerilogTristateIsMemory' or 'yagleTristateIsMemory' is used to drive a behavioural model.
158 ARGS
159 name % Signal's name
160 */
161 void inf_DefineKeepTristateBehaviour(char *name);
162
163 /*------------------
164 MAN inf_DefinePrecharge
165 CATEG tcl+disa
166 DESCRIPTION
167 Sets a signal as a precharge.
168 ARGS
169 name % Signal's name
170 */
171 void inf_DefinePrecharge(char *name);
172
173 /*------------------
174 MAN inf_DefineNotPrecharge
175 CATEG tcl+disa
176 DESCRIPTION
177 Disables the identification of a precharge on a signal
178 ARGS
179 name % Signal's name
180 */
181 void inf_DefineNotPrecharge(char *name);
182
183 /*------------------
184 MAN inf_DefineModelLatchLoop
185 CATEG tcl+disa
186 DESCRIPTION
187 Feedback loop is explicitly modeled in behavioural model if signal is a static latch.
188 ARGS
189 name % Signal's name
190 */
191 void inf_DefineModelLatchLoop(char *name);
192
193 /*------------------
194 MAN inf_DefineMemsym
195 CATEG tcl+disa
196 DESCRIPTION
197 Sets a pair of signals to be a symmetric memory so long as there is a loop between the two signals.
198 ARGS
199 name0 % name of first memsym signal.
200 name1 % name of second memsym signal.
201 EXAMPLE % {inf_DefineMemsym memsym0 memsym1}
202 */
203 void inf_DefineMemsym(char *name0, char *name1);
204
205 /*------------------
206 MAN inf_DefineRS
207 CATEG tcl+disa
208 DESCRIPTION
209 Allows control of how individual RS are handled. Overrides the global setting in yagAutomaticRSDetection.
210 ARGS
211 name % Signal's name, either the set or the reset one is enough.
212 type % LEGAL, ILLEGAL or MARK_ONLY.
213 EXAMPLE % {inf_DefineRS rsnode "LEGAL"}
214 */
215 void inf_DefineRS(char *name, char *type);
216
217 /*------------------
218 MAN inf_MarkSignal
219 CATEG tcl+disa
220 DESCRIPTION
221 Allows application of special signal markings, such as latch identification.
222 ARGS
223 name % Signal's name
224 marks % For a complete list of markings please refer to the INF section of this manual, MARKSIG subsection.
225 EXAMPLE % {inf_MarkSignal dff_m "LATCH+MASTER"}
226 */
227 void inf_MarkSignal(char *name, char *marks);
228
229 /*------------------
230 MAN inf_MarkTransistor
231 CATEG tcl+disa
232 DESCRIPTION
233 Allows application of special transistor markings, such as latch commands identification.
234 ARGS
235 name % Signal's name
236 marks % Legal markings are "Bleeder", "Feedback", "Command", "NonFunctional", "Blocker", "Short", "Unused". Types may be concatenated with the '+' character and are case-insensitive. For a description of the types please refer to the INF section of this manual, MARKTRANS subsection.
237 EXAMPLE % {inf_MarkTrans m0 "FEEDBACK+NOT_FUNCTIONAL"}
238 */
239 void inf_MarkTransistor(char *name, char *marks);
240
241
242 /* ================================================================== */
243 /* BEHAVIOR */
244 /* ================================================================== */
245
246 /*------------------
247 MAN inf_DefineSensitive
248 CATEG tcl+yag
249 DESCRIPTION
250 Sets a signal as a timing sensitive net.
251 ARGS
252 name % Signal's name
253 */
254 void inf_DefineSensitive(char *name);
255
256 /*------------------
257 MAN inf_DefineSuppress
258 CATEG tcl+yag
259 DESCRIPTION
260 Sets an auxiliary signal to be suppressed.
261 ARGS
262 name % Signal's name
263 */
264 void inf_DefineSuppress(char *name);
265
266 /* ================================================================== */
267 /* XTALK */
268 /* ================================================================== */
269
270 /*------------------
271 MAN inf_DefineCrosstalkMutex
272 CATEG tcl+xtalk
273 DESCRIPTION
274 Sets mutually exclusive signals with regard to crosstalk analysis.
275 ARGS
276 type % Legal values are {muxup} and {muxdn}.
277 list % List of signals on which to apply mutual exclusion constraints
278 */
279 void inf_DefineCrosstalkMutex(char *type, List *list);
280
281 /* ================================================================== */
282 /* TIMING */
283 /* ================================================================== */
284
285 /*------------------
286 MAN xxxinf_DefineBreak
287 CATEG tcl+timing
288 DESCRIPTION
289 Sets a signal as a break point.
290 ARGS
291 name % Signal's name
292 */
293 void inf_DefineBreak(char *name);
294
295 /*------------------
296 MAN xxxinf_DefineInter
297 CATEG tcl+timing
298 DESCRIPTION
299 Sets signal as an intermediary point for path factorization
300 ARGS
301 name % Signal's name
302 */
303 void inf_DefineInter(char *name);
304
305
306 /*------------------
307 MAN inf_DefineConnectorSwing
308 CATEG tcl+timing
309 DESCRIPTION
310 Sets the switching voltage magnitude for a connector. This is usefull for multivoltage analysis.
311 ARGS
312 name % Connector's name
313 lowlevel % Lower-bound voltage level, in Volts
314 highlevel % Upper-bound voltage level, in Volts
315 */
316 void inf_DefineConnectorSwing(char *name, double lowlevel, double highlevel);
317
318 /*------------------
319 MAN inf_DefinePathDelayMargin
320 CATEG tcl+timing
321 DESCRIPTION
322 Defines a derating to be applied on a path delay, with the following formula: {new_delay = real_delay * factor + delta}. This derating is only used for the computation of setup and hold slacks by the by slack report functions.
323 ARGS
324 type % Arrival point type of the path on which to apply the derating. Valid values are {any}, {latch}, {break}, {prech} and {con} (connector)
325 name % Arrival point name of the path on which to apply the derating. Wildcards can be used.
326 factor % Integer value
327 delta % Integer value
328 pathtype % String with tokens separated by spaces or {_}. Valid token values for pathtype are {clockpath}, {datapath}, {min}, {max}, {rise} and {fall}. An empty string means that all the tokens are used.
329
330 */
331 void inf_DefinePathDelayMargin(char *type, char *name, double factor, double delta, char *pathtype);
332
333
334 /*------------------
335 MAN inf_DefineConnectorDirections
336 CATEG tcl+timing
337 DESCRIPTION
338 Modifies the direction of connectors
339 ARGS
340 type % Affected direction, can be {Input}, {Output}, {InOut}, {Tristate}, {HZ} or {Unknown}
341 list % List of signals a new direction will be affected to
342 */
343 void inf_DefineConnectorDirections(char *type, List *list);
344
345
346 /*------------------
347 MAN inf_DefineNORC
348 CATEG tcl+timing
349 DESCRIPTION
350 Disables RC delay computation on a signal
351 ARGS
352 name % Signal's name
353 */
354 void inf_DefineNORC(char *name);
355
356 /*------------------
357 MAN inf_DefineDoNotCross
358 CATEG tcl+timing
359 DESCRIPTION
360 Disables the transparency of a latch or precharge, so that no path can traverse it.
361 Effective only when static timing analysis has been run ({stb}). To be used together with {avtMaxPathPeriodDepth}.
362 ARGS
363 name % Signal's name
364 */
365 void inf_DefineDoNotCross(char *name);
366
367 /*------------------
368 MAN inf_DefineTransparent
369 CATEG tcl+timing
370 DESCRIPTION
371 Force transparency of a latch or precharge, so that path can traverse it.
372 ARGS
373 name % Signal's name
374 */
375 void inf_DefineTransparent(char *name);
376
377 /*------------------
378 MAN inf_DisableTimingArc
379 CATEG tcl+timing
380 DESCRIPTION
381 Disables the construction of timing arcs between timing signals.
382 ARGS
383 input % Source timing signal of the timing arc to disable
384 output % Sink timing signal node of the timing arc to disable
385 direction % Transition to disable: {du}, {ud}, {dd}, {uu}, {?u}...
386 EXAMPLE % {inf_DisableTimingArc in out ud}
387 */
388 void inf_DisableTimingArc(char *input, char *output, char *direction);
389
390 /*------------------
391 MAN inf_DefineFalsePath
392 CATEG tcl+timing
393 DESCRIPTION
394 Defines a false path.
395 The parameters use the same syntax as in the .inf file except for the signal direction specification which does not allow spaces. Valid values {<up>} and {<down>}.
396 ARGS
397 EXAMPLE % {inf_DefineFalsePath [list sig1 <up> sig2 <down> sig3 sig4]}.
398 */
399 void inf_DefineFalsePath(List *arglist);
400
401 /* ================================================================== */
402 /* TIMING ABSTRACTION */
403 /* ================================================================== */
404
405 /*------------------
406 MAN inf_DefineSlopeRange
407 CATEG tcl+abstraction
408 DESCRIPTION
409 Sets a range for input slopes in lookup tables construction (.lib file purpose), values in Seconds. This function must be called before database construction ({hitas} function) for ranges to be taken into account.
410 ARGS
411 name % Connector the defined range will be applied on, {default} is for all connectors.
412 type % {custom} or {linear}.
413 argv % If {type} is {custom}, list of values defining the slope range. If {type} is {linear}, 3-uple {(first_slope, last_slope, step)}.
414 EXAMPLE % {inf_DefineSlopeRange default [list 50e-12 120e-12 240e-12] custom}
415 */
416 void inf_DefineSlopeRange(char *name, List *argv, char *type);
417
418 /*------------------
419 MAN inf_DefineCapacitanceRange
420 CATEG tcl+abstraction
421 DESCRIPTION
422 Sets a range for ouput capacitances in lookup tables construction (.lib file purpose), values in Fahrads. This function must be called before database construction ({hitas} function) for ranges to be taken into account.
423 ARGS
424 name % Connector the defined range will be applied on, {default} is for all connectors.
425 type % {custom} or {linear}.
426 argv % If {type} is {custom}, list of values defining the capacitance range. If {type} is {linear}, 3-uple {(first_capa, last_capa, step)}.
427 EXAMPLE % {inf_DefineCapacitanceRange default [list 100e-15 200e-15 300e-15] custom}
428 */
429 void inf_DefineCapacitanceRange(char *name, List *argv, char *type);
430
431 /* ================================================================== */
432 /* STATIC TIMING ANALYSIS */
433 /* ================================================================== */
434
435 /*------------------
436 MAN xxxinf_SetSetupMargin
437 CATEG tcl+stab
438 DESCRIPTION
439 Sets an additionnal global margin on all setup slacks
440 ARGS
441 value % Additionnal margin (in Seconds)
442 EXAMPLE % {inf_SetSetupMargin 100e-12}
443 */
444 void inf_SetSetupMargin(double value);
445
446 /*------------------
447 MAN xxxinf_SetHoldMargin
448 CATEG tcl+stab
449 DESCRIPTION
450 Sets an additionnal global margin on all hold slacks
451 ARGS
452 value % Additionnal margin (in Seconds)
453 EXAMPLE % {inf_SetHoldMargin 100e-12}
454 */
455 void inf_SetHoldMargin(double value);
456
457
458 /*------------------
459 MAN inf_DefineStrictSetup
460 CATEG tcl+stab
461 DESCRIPTION
462 Defines an latch whose setup must be check on the command opening event rather than the closing event.
463 ARGS
464 name % Name of the latch
465 EXAMPLE % {inf_DefineStrictSetup mylatch}
466 */
467 void inf_DefineStrictSetup(char *name);
468
469 /*------------------
470 MAN inf_DefineAsynchron
471 CATEG tcl+stab
472 DESCRIPTION
473 Defines an asynchronous pin, i.e. reset pin. Necessary to obtain recovery/removal timing groups in .lib characterization.
474 ARGS
475 name % Name of the reset pin
476 EXAMPLE % {inf_DefineAsynchron reset}
477 */
478 void inf_DefineAsynchron(char *name);
479
480 /*------------------
481 MAN inf_DefineEquivalentClockGroup
482 CATEG tcl+stab
483 DESCRIPTION
484 Sets clocks as belonging to the same timing domain.
485 ARGS
486 domain % Timing domain name
487 list % Set of clocks belonging to the domain
488 EXAMPLE % {inf_DefineEquivalentClockGroup domain1 [list ck1 ck2] }
489 */
490 void inf_DefineEquivalentClockGroup(char *domain, List *list);
491
492 /*------------------
493 MAN inf_DefineClockPriority
494 CATEG tcl+stab
495 DESCRIPTION
496 Defines the preferred clock for a signal in case of multiple clock possibility.
497 ARGS
498 name % Signal's name
499 clock % Priority clock
500 */
501 void inf_DefineClockPriority(char *name, char *clock);
502
503
504 void inf_DefineCharacteristics (char *type, List *argv);
505
506
507 /*------------------
508 MAN inf_DefineDirective
509 CATEG tcl+stab
510 SYNOPSIS
511 inf_DefineDirective <{mode}> [{type1}] <{signal1}> [{dir1}] <{operation}> [{type2}] <{signal2}> [{dir2}] [{margin}]
512 DESCRIPTION
513 Adds a custom timing check between any two nodes. This timing check will be taken into account in STA and slack reports.
514 ARGS
515 mode % Type of operation: {check} or {filter}.
516 type1 % Type of propagated information on {signal1} to check: {clock} or {data}. Default is {data}.
517 signal1 % Net name of the first signal.
518 dir1 % Edge or value of {signal1} to consider: {rising} or {falling}. Default is both.
519 operation % {before}, {after} or {with}. Operation {with} checks that {signal1} is stable when {signal2}'s state is up or down. {with} cannot be used with {signal1} as a clock or {signal2} as a data, and {dir2} as falling or rising. Operations {before} and {after} compare arrival times between clock/data and clock/data. {dir1} and {dir2} can be {rising} or {falling} only.
520 type2 % Type of propagated information on {signal2} to check: {clock} or {data}. Default is {data}.
521 signal2 % Net name of the second signal.
522 dir2 % Edge or value of {signal2} to consider: {rising}, {falling}, {up} or {down}. Default is rising and falling.
523 margin % Margin to add when computing slack or constraint.
524 EXAMPLE % {inf_DefineDirective check "data" with clock "data" up}.\$Checks that "data" is stable when the propagated clock state on data is high.
525 */
526 void inf_DefineDirective(void); // (void) disables the gns wrappers
527 void inf_DefineDirective_sub(List *argv);
528
529 /*------------------
530 MAN inf_DefineFalseSlack
531 CATEG tcl+stab
532 SYNOPSIS
533 inf_DefineFalseSlack [<restriction>:] <{startclock}> [{<startclock_dir>}] <{startnode}> [{<startnode_dir>}] <{endnode}> [{<endnode_dir>}] [{<endnode_hz_state>}] <{endclock}>
534 DESCRIPTION
535 Defines a slack as being invalid.
536 ARGS
537 restriction % a '-' separated list of checks/signal types. Possible values: {setup}, {hold}, {latch}, {prech}. {latch} and {prech} define {endnode} signal type. Default is "setup-hold".
538 startclock % name of the clock generating the {startnode} data
539 startclock_dir % transition of {startclock} : <up>, <down>, <rise> or <fall>. Default is both.
540 startnode % name of the generated data node
541 startnode_dir % transition of {startnode} : <up>, <down>, <rise> or <fall>. Default is both.
542 endnode % name of the data arrival node
543 endnode_dir % transition of {endnodestartnode} : <up>, <down>, <rise> or <fall>. Default is both.
544 endnode_hz_state % specify whether the end node transition goes to hz state or not: <hz> or <nothz>. Default is both.
545 endclock % name of the clock controlling the arrival node
546 EXAMPLE % {inf_DefineFalseSlack setup: "ck" <rise> "data" <rise> "arrival" "ck2"}.
547 */
548 void inf_DefineFalseSlack(void); // (void) disables the gns wrappers
549 void inf_DefineFalseSlack_sub(List *argv);
550
551 /*------------------
552 MAN inf_DefineSwitchingProbability
553 CATEG tcl+stab
554 SYNOPSIS
555 inf_DefineSwitchingProbability {signal} {switching probability}
556 DESCRIPTION
557 [IN ALPHA DEVELOPMENT STAGE] Associates a switching probability to {signal}. This probability can be used by CTK to remove non interesting agressions (see also variable: stbCtkMinOccurenceProbability).
558 ARGS
559 signal % signal to associate the probability to.
560 switching probability % probability value from 0 to 1.
561 EXAMPLE % {inf_DefineSwitchingProbability "enable" 0.25}. Signal "enable" can switch 1 time each 4 clock cycles.
562 */
563 void inf_DefineSwitchingProbability(char *name, double val);
564
565 /* ================================================================== */
566 /* OBSOLETE */
567 /* ================================================================== */
568
569 void inf_DefineDisable(char *origin, char *destination);
570 void inf_DefineNoFalling(char *name);
571 void inf_DefineNoRising(char *name);
572 void inf_DefineStability(List *arglist);
573 void inf_DefinePower(char *name, double voltage);
574 void inf_DefineTemperature(double value);
575 void inf_DefineAsynchronousClockGroup(char *domain, List *list, double period);
576 void inf_DefineConstraint(char *name, int value);
577 void inf_DefineFlipFlop(char *name);
578 void inf_DefineRename(char *origin, char *destination);
579 void inf_DefineDelay(char *origin, char *destination, double delay);
580 void inf_DefineBypass(char *name, char *where);
581 void inf_SetPeriod(double value);
582 void inf_DefineCkPrech(char *name);
583 void inf_DefineSlew(char *name, double slope_rise, double slope_fall);
584 void inf_DefineSlope(char *name, double slope_rise, double slope_fall);
585 void inf_DefineRC(char *name);
586 void inf_DefineConditionedCommandStates(char *name, char *state);
587 void inf_DefineCkLatch(char *name);
588 void inf_DefineNotCkLatch(char *name);
589 void inf_DefineClock(List *argv);
590
591
592 /* ================================================================== */
593 /* DEBUG */
594 /* ================================================================== */
595
596 void inf_CheckRegistry_i(char *name, int level, List *data);
597 void inf_DumpRegistry_i(char *name);