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[tas-yagle.git] / distrib / sources / man / man5 / ttv.5
1 .TH TTV 5 "30 March 2000" "AVERTEC" "File Formats"
2
3 .SH NAME
4 .PP
5 \fBttv\fP \- The timing analyzer \fBtas\fP report : 'general perfmodule' format.
6
7 .so man1/avt_origin.1
8 .SH DESCRIPTION
9 .PP
10
11 The timing analyzer \fBtas\fP reports its results in
12 a file, named 'perfmodule'. There are two kind of perfmodules:
13 the 'intermediate' (or 'detailed") and the 'general'. The first one has a \fBht\fPv
14 extension and is obtained if the \fB-t\fP option is used. It
15 contains gate delays between two signals. The second one
16 has the \fBttv\fP extension and contains all critical paths
17 between two reference points. The perfmodule has several
18 articles.
19
20
21 .TP 20
22 \fBTerminals\fP
23 Terminals are reported on the \fBX\fP article.
24
25 .RS 5
26 .PP
27 X \fIdirection name capacitance\fP ;
28 .RE
29
30 .PP
31 The 'terminal' direction can be:
32
33 .RS 5
34 .TP 5
35 \fII\fP
36 for an input terminal
37
38 .TP 5
39 \fIT\fP
40 for a transceiver terminal
41
42 .TP 5
43 \fIB\fP
44 for a bidirectional terminal
45
46 .TP 5
47 \fIO\fP
48 for an output terminal
49
50 .TP 5
51 \fIZ\fP
52 for a high-impedance terminal
53
54 .TP 5
55 \fIU\fP
56 for an unknown direction
57 .RE
58
59 .TP 20
60 \fBLatches\fP
61 Latches are reported on the \fBL S\fP article.
62
63 .RS 5
64 .PP
65 L S \fIname ( cmd1 cmd2 ... )\fP ;
66 .RE
67
68 .TP 20
69 \fBFlipflop\fP
70 Flipflop are reported on the \fBL F\fP article.
71
72 .RS 5
73 .PP
74 L F \fIname ( cmd1 cmd2 ... )\fP ;
75 .RE
76
77 .PP
78 A latch or a flipflop may have several commands. All of them belong to
79 the \fBL S\fP or \fBL F\fP article .
80
81 .TP 20
82 \fBPrecharged signals\fP
83 Precharged signals are reported on the \fBP\fP article.
84
85 .RS 5
86 .PP
87 P \fIname\fP ;
88 .RE
89
90 .TP 20
91 \fBTransitions\fP
92 Transitions between signals are reported to the \fBT\fP
93 article.
94
95 .RS 5
96 .PP
97 T \fItype begin end ( (control (input_commutation output_commutation
98 delay resistance slope)))\fP ;
99 .RE
100
101 .PP
102 Each 'transition' has one of the following type:
103
104 .RS 5
105 .TP 5
106 \fIE\fP
107 if the path output is a precharged signal and
108 the transition concerns an evaluation phase.
109
110 .TP 5
111 \fIP\fP
112 if the path output is a precharged signal and
113 the transition concerns an precharged phase.
114
115 .TP 5
116 \fIX\fP
117 if the output is not a precharged signal.
118 .RE
119
120 .PP
121 Each 'commutation' has one of the following type:
122
123 .RS 5
124 .TP 5
125 \fIU\fP
126 for a rising edge.
127
128 .TP 5
129 \fID\fP
130 for a falling edge.
131
132 .TP 5
133 \fIZ\fP
134 for a commutation when the output is a
135 precharged signal.
136 .RE
137
138 .PP
139 If the end of path is a register, the 'control' field
140 indicates which signal controls the transition. And if the end
141 of path is a terminal, in each transition, the output
142 resistance and the output slope will be reported. This
143 allows a hierarchical analysis. In the other case, only the
144 delay appears in the transition line.
145
146 .SH SEE ALSO
147 .PP
148 tas(1),dtv(5)
149
150
151 .so man1/avt_bug_report.1
152