2 * ecpprog -- simple programming tool for FTDI-based JTAG programmers
5 * Copyright (C) 2015 Clifford Wolf <clifford@clifford.at>
6 * Copyright (C) 2018 Piotr Esden-Tempski <piotr@esden.net>
7 * Copyright (C) 2020 Gregory Davill <greg.davill@gmail.com>
9 * Permission to use, copy, modify, and/or distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * http://www.latticesemi.com/~/media/Documents/UserManuals/EI/icestickusermanual.pdf
24 * http://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_32mb_3v_65nm.pdf
37 #include <sys/types.h>
41 #include <io.h> /* _setmode() */
42 #include <fcntl.h> /* _O_BINARY */
46 #include "lattice_cmds.h"
48 static bool verbose
= false;
59 enum device_type type
;
62 static struct device_info connected_device
= {0};
65 // ---------------------------------------------------------
67 // ---------------------------------------------------------
69 /* Flash command definitions */
70 /* This command list is based on the Winbond W25Q128JV Datasheet */
72 FC_WE
= 0x06, /* Write Enable */
73 FC_SRWE
= 0x50, /* Volatile SR Write Enable */
74 FC_WD
= 0x04, /* Write Disable */
75 FC_RPD
= 0xAB, /* Release Power-Down, returns Device ID */
76 FC_MFGID
= 0x90, /* Read Manufacturer/Device ID */
77 FC_JEDECID
= 0x9F, /* Read JEDEC ID */
78 FC_UID
= 0x4B, /* Read Unique ID */
79 FC_RD
= 0x03, /* Read Data */
80 FC_FR
= 0x0B, /* Fast Read */
81 FC_PP
= 0x02, /* Page Program */
82 FC_SE
= 0x20, /* Sector Erase 4kb */
83 FC_BE32
= 0x52, /* Block Erase 32kb */
84 FC_BE64
= 0xD8, /* Block Erase 64kb */
85 FC_CE
= 0xC7, /* Chip Erase */
86 FC_RSR1
= 0x05, /* Read Status Register 1 */
87 FC_WSR1
= 0x01, /* Write Status Register 1 */
88 FC_RSR2
= 0x35, /* Read Status Register 2 */
89 FC_WSR2
= 0x31, /* Write Status Register 2 */
90 FC_RSR3
= 0x15, /* Read Status Register 3 */
91 FC_WSR3
= 0x11, /* Write Status Register 3 */
92 FC_RSFDP
= 0x5A, /* Read SFDP Register */
93 FC_ESR
= 0x44, /* Erase Security Register */
94 FC_PSR
= 0x42, /* Program Security Register */
95 FC_RSR
= 0x48, /* Read Security Register */
96 FC_GBL
= 0x7E, /* Global Block Lock */
97 FC_GBU
= 0x98, /* Global Block Unlock */
98 FC_RBL
= 0x3D, /* Read Block Lock */
99 FC_RPR
= 0x3C, /* Read Sector Protection Registers (adesto) */
100 FC_IBL
= 0x36, /* Individual Block Lock */
101 FC_IBU
= 0x39, /* Individual Block Unlock */
102 FC_EPS
= 0x75, /* Erase / Program Suspend */
103 FC_EPR
= 0x7A, /* Erase / Program Resume */
104 FC_PD
= 0xB9, /* Power-down */
105 FC_QPI
= 0x38, /* Enter QPI mode */
106 FC_ERESET
= 0x66, /* Enable Reset */
107 FC_RESET
= 0x99, /* Reset Device */
111 // ---------------------------------------------------------
112 // JTAG -> SPI functions
113 // ---------------------------------------------------------
116 * JTAG performrs all shifts LSB first, our FLSAH is expeting bytes MSB first,
117 * There are a few ways to fix this, for now we just bit-reverse all the input data to the JTAG core
119 uint8_t bit_reverse(uint8_t in
){
121 uint8_t out
= (in
& 0x01) ? 0x80 : 0x00;
122 out
|= (in
& 0x02) ? 0x40 : 0x00;
123 out
|= (in
& 0x04) ? 0x20 : 0x00;
124 out
|= (in
& 0x08) ? 0x10 : 0x00;
125 out
|= (in
& 0x10) ? 0x08 : 0x00;
126 out
|= (in
& 0x20) ? 0x04 : 0x00;
127 out
|= (in
& 0x40) ? 0x02 : 0x00;
128 out
|= (in
& 0x80) ? 0x01 : 0x00;
133 void xfer_spi(uint8_t* data
, uint32_t len
){
134 /* Reverse bit order of all bytes */
135 for(int i
= 0; i
< len
; i
++){
136 data
[i
] = bit_reverse(data
[i
]);
139 /* Don't switch states if we're already in SHIFT-DR */
140 if(jtag_current_state() != STATE_SHIFT_DR
)
141 jtag_go_to_state(STATE_SHIFT_DR
);
142 jtag_tap_shift(data
, data
, len
* 8, true);
144 /* Reverse bit order of all return bytes */
145 for(int i
= 0; i
< len
; i
++){
146 data
[i
] = bit_reverse(data
[i
]);
150 void send_spi(uint8_t* data
, uint32_t len
){
152 /* Flip bit order of all bytes */
153 for(int i
= 0; i
< len
; i
++){
154 data
[i
] = bit_reverse(data
[i
]);
157 jtag_go_to_state(STATE_SHIFT_DR
);
158 /* Stay in SHIFT-DR state, this keep CS low */
159 jtag_tap_shift(data
, data
, len
* 8, false);
161 /* Flip bit order of all bytes */
162 for(int i
= 0; i
< len
; i
++){
163 data
[i
] = bit_reverse(data
[i
]);
168 // ---------------------------------------------------------
169 // FLASH function implementations
170 // ---------------------------------------------------------
172 static void flash_read_id()
174 /* JEDEC ID structure:
175 * Byte No. | Data Type
176 * ---------+----------
177 * 0 | FC_JEDECID Request Command
181 * 4 | Ext Dev Str Len
184 uint8_t data
[260] = { FC_JEDECID
};
185 int len
= 4; // command + 4 response bytes
188 fprintf(stderr
, "read flash ID..\n");
190 // Write command and read first 4 bytes
193 fprintf(stderr
, "flash ID:");
194 for (int i
= 1; i
< len
; i
++)
195 fprintf(stderr
, " 0x%02X", data
[i
]);
196 fprintf(stderr
, "\n");
199 static void flash_reset()
201 uint8_t data
[8] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
205 static uint8_t read_status_1(){
206 uint8_t data
[2] = { FC_RSR1
};
211 fprintf(stderr
, "SR1: 0x%02X\n", data
[1]);
212 fprintf(stderr
, " - SPRL: %s\n",
213 ((data
[1] & (1 << 7)) == 0) ?
216 fprintf(stderr
, " - SPM: %s\n",
217 ((data
[1] & (1 << 6)) == 0) ?
218 "Byte/Page Prog Mode" :
219 "Sequential Prog Mode");
220 fprintf(stderr
, " - EPE: %s\n",
221 ((data
[1] & (1 << 5)) == 0) ?
222 "Erase/Prog success" :
224 fprintf(stderr
, "- SPM: %s\n",
225 ((data
[1] & (1 << 4)) == 0) ?
228 fprintf(stderr
, " - SWP: ");
229 switch((data
[1] >> 2) & 0x3) {
231 fprintf(stderr
, "All sectors unprotected\n");
234 fprintf(stderr
, "Some sectors protected\n");
237 fprintf(stderr
, "Reserved (xxxx 10xx)\n");
240 fprintf(stderr
, "All sectors protected\n");
243 fprintf(stderr
, " - WEL: %s\n",
244 ((data
[1] & (1 << 1)) == 0) ?
245 "Not write enabled" :
247 fprintf(stderr
, " - ~RDY: %s\n",
248 ((data
[1] & (1 << 0)) == 0) ?
256 static uint8_t read_status_2(){
257 uint8_t data
[2] = { FC_RSR2
};
262 fprintf(stderr
, "SR2: 0x%02X\n", data
[1]);
263 fprintf(stderr
, " - QE: %s\n",
264 ((data
[1] & (1 << 2)) == 0) ?
273 static uint8_t flash_read_status()
275 uint8_t ret
= read_status_1();
282 static void flash_write_enable()
285 fprintf(stderr
, "status before enable:\n");
290 fprintf(stderr
, "write enable..\n");
292 uint8_t data
[1] = { FC_WE
};
296 fprintf(stderr
, "status after enable:\n");
301 static void flash_bulk_erase()
303 fprintf(stderr
, "bulk erase..\n");
305 uint8_t data
[1] = { FC_CE
};
309 static void flash_4kB_sector_erase(int addr
)
311 fprintf(stderr
, "erase 4kB sector at 0x%06X..\n", addr
);
313 uint8_t command
[4] = { FC_SE
, (uint8_t)(addr
>> 16), (uint8_t)(addr
>> 8), (uint8_t)addr
};
315 xfer_spi(command
, 4);
318 static void flash_32kB_sector_erase(int addr
)
320 fprintf(stderr
, "erase 64kB sector at 0x%06X..\n", addr
);
322 uint8_t command
[4] = { FC_BE32
, (uint8_t)(addr
>> 16), (uint8_t)(addr
>> 8), (uint8_t)addr
};
324 xfer_spi(command
, 4);
327 static void flash_64kB_sector_erase(int addr
)
329 fprintf(stderr
, "erase 64kB sector at 0x%06X..\n", addr
);
331 uint8_t command
[4] = { FC_BE64
, (uint8_t)(addr
>> 16), (uint8_t)(addr
>> 8), (uint8_t)addr
};
333 xfer_spi(command
, 4);
336 static void flash_prog(int addr
, uint8_t *data
, int n
)
339 fprintf(stderr
, "prog 0x%06X +0x%03X..\n", addr
, n
);
341 uint8_t command
[4] = { FC_PP
, (uint8_t)(addr
>> 16), (uint8_t)(addr
>> 8), (uint8_t)addr
};
343 send_spi(command
, 4);
347 for (int i
= 0; i
< n
; i
++)
348 fprintf(stderr
, "%02x%c", data
[i
], i
== n
- 1 || i
% 32 == 31 ? '\n' : ' ');
352 static void flash_start_read(int addr
)
355 fprintf(stderr
, "Start Read 0x%06X\n", addr
);
357 uint8_t command
[4] = { FC_RD
, (uint8_t)(addr
>> 16), (uint8_t)(addr
>> 8), (uint8_t)addr
};
359 send_spi(command
, 4);
362 static void flash_continue_read(uint8_t *data
, int n
)
365 fprintf(stderr
, "Contiune Read +0x%03X..\n", n
);
371 for (int i
= 0; i
< n
; i
++)
372 fprintf(stderr
, "%02x%c", data
[i
], i
== n
- 1 || i
% 32 == 31 ? '\n' : ' ');
375 static void flash_wait()
378 fprintf(stderr
, "waiting..");
383 uint8_t data
[2] = { FC_RSR1
};
387 if ((data
[1] & 0x01) == 0) {
391 fprintf(stderr
, "r");
396 fprintf(stderr
, "R");
403 fprintf(stderr
, ".");
413 fprintf(stderr
, "\n");
417 static void flash_disable_protection()
419 fprintf(stderr
, "disable flash protection...\n");
421 // Write Status Register 1 <- 0x00
422 uint8_t data
[2] = { FC_WSR1
, 0x00 };
427 // Read Status Register 1
433 fprintf(stderr
, "failed to disable protection, SR now equal to 0x%02x (expected 0x00)\n", data
[1]);
437 // ---------------------------------------------------------
438 // ECP5 specific JTAG functions
439 // ---------------------------------------------------------
441 static void print_idcode(uint32_t idcode
){
442 connected_device
.id
= idcode
;
445 for(int i
= 0; i
< sizeof(ecp_devices
)/sizeof(struct device_id_pair
); i
++){
446 if(idcode
== ecp_devices
[i
].device_id
)
448 connected_device
.name
= ecp_devices
[i
].device_name
;
449 connected_device
.type
= TYPE_ECP5
;
450 printf("IDCODE: 0x%08x (%s)\n", idcode
,ecp_devices
[i
].device_name
);
456 for(int i
= 0; i
< sizeof(nx_devices
)/sizeof(struct device_id_pair
); i
++){
457 if(idcode
== nx_devices
[i
].device_id
)
459 connected_device
.name
= nx_devices
[i
].device_name
;
460 connected_device
.type
= TYPE_NX
;
461 printf("IDCODE: 0x%08x (%s)\n", idcode
,nx_devices
[i
].device_name
);
465 printf("IDCODE: 0x%08x does not match :(\n", idcode
);
468 static void read_idcode(){
470 uint8_t data
[4] = {READ_ID
};
472 jtag_go_to_state(STATE_SHIFT_IR
);
473 jtag_tap_shift(data
, data
, 8, true);
476 jtag_go_to_state(STATE_SHIFT_DR
);
477 jtag_tap_shift(data
, data
, 32, true);
481 /* Format the IDCODE into a 32bit value */
482 for(int i
= 0; i
< 4; i
++)
483 idcode
= data
[i
] << 24 | idcode
>> 8;
485 print_idcode(idcode
);
488 void print_ecp5_status_register(uint32_t status
){
489 printf("ECP5 Status Register: 0x%08x\n", status
);
492 printf(" Transparent Mode: %s\n", status
& (1 << 0) ? "Yes" : "No" );
493 printf(" Config Target: %s\n", status
& (7 << 1) ? "eFuse" : "SRAM" );
494 printf(" JTAG Active: %s\n", status
& (1 << 4) ? "Yes" : "No" );
495 printf(" PWD Protection: %s\n", status
& (1 << 5) ? "Yes" : "No" );
496 printf(" Decrypt Enable: %s\n", status
& (1 << 7) ? "Yes" : "No" );
497 printf(" DONE: %s\n", status
& (1 << 8) ? "Yes" : "No" );
498 printf(" ISC Enable: %s\n", status
& (1 << 9) ? "Yes" : "No" );
499 printf(" Write Enable: %s\n", status
& (1 << 10) ? "Writable" : "Not Writable");
500 printf(" Read Enable: %s\n", status
& (1 << 11) ? "Readable" : "Not Readable");
501 printf(" Busy Flag: %s\n", status
& (1 << 12) ? "Yes" : "No" );
502 printf(" Fail Flag: %s\n", status
& (1 << 13) ? "Yes" : "No" );
503 printf(" Feature OTP: %s\n", status
& (1 << 14) ? "Yes" : "No" );
504 printf(" Decrypt Only: %s\n", status
& (1 << 15) ? "Yes" : "No" );
505 printf(" PWD Enable: %s\n", status
& (1 << 16) ? "Yes" : "No" );
506 printf(" Encrypt Preamble: %s\n", status
& (1 << 20) ? "Yes" : "No" );
507 printf(" Std Preamble: %s\n", status
& (1 << 21) ? "Yes" : "No" );
508 printf(" SPIm Fail 1: %s\n", status
& (1 << 22) ? "Yes" : "No" );
510 uint8_t bse_error
= (status
& (7 << 23)) >> 23;
512 case 0b000: printf(" BSE Error Code: No Error (0b000)\n"); break;
513 case 0b001: printf(" BSE Error Code: ID Error (0b001)\n"); break;
514 case 0b010: printf(" BSE Error Code: CMD Error - illegal command (0b010)\n"); break;
515 case 0b011: printf(" BSE Error Code: CRC Error (0b011)\n"); break;
516 case 0b100: printf(" BSE Error Code: PRMB Error - preamble error (0b100)\n"); break;
517 case 0b101: printf(" BSE Error Code: ABRT Error - configuration aborted by the user (0b101)\n"); break;
518 case 0b110: printf(" BSE Error Code: OVFL Error - data overflow error (0b110)\n"); break;
519 case 0b111: printf(" BSE Error Code: SDM Error - bitstream pass the size of SRAM array (0b111)\n"); break;
522 printf(" Execution Error: %s\n", status
& (1 << 26) ? "Yes" : "No" );
523 printf(" ID Error: %s\n", status
& (1 << 27) ? "Yes" : "No" );
524 printf(" Invalid Command: %s\n", status
& (1 << 28) ? "Yes" : "No" );
525 printf(" SED Error: %s\n", status
& (1 << 29) ? "Yes" : "No" );
526 printf(" Bypass Mode: %s\n", status
& (1 << 30) ? "Yes" : "No" );
527 printf(" Flow Through Mode: %s\n", status
& (1 << 31) ? "Yes" : "No" );
531 void print_nx_status_register(uint64_t status
){
532 printf("NX Status Register: 0x%016lx\n", status
);
535 printf(" Transparent Mode: %s\n", status
& (1 << 0) ? "Yes" : "No" );
536 printf(" Config Target: ");
537 uint8_t config_target
= status
& (0b111 << 1) >> 1;
538 switch (config_target
){
539 case 0b000: printf("SRAM (0b000)\n"); break;
540 case 0b001: printf("EFUSE Normal (0b001)\n"); break;
541 case 0b010: printf("EFUSE Pseudo (0b010)\n"); break;
542 case 0b011: printf("EFUSE Safe (0b011)\n"); break;
543 default: printf("Invalid (%u)\n", config_target
); break;
546 printf(" JTAG Active: %s\n", status
& (1 << 4) ? "Yes" : "No" );
547 printf(" PWD Protection: %s\n", status
& (1 << 5) ? "Yes" : "No" );
548 printf(" OTP: %s\n", status
& (1 << 6) ? "Yes" : "No" );
549 printf(" DONE: %s\n", status
& (1 << 8) ? "Yes" : "No" );
550 printf(" ISC Enable: %s\n", status
& (1 << 9) ? "Yes" : "No" );
551 printf(" Write Enable: %s\n", status
& (1 << 10) ? "Writable" : "Not Writable");
552 printf(" Read Enable: %s\n", status
& (1 << 11) ? "Readable" : "Not Readable");
553 printf(" Busy Flag: %s\n", status
& (1 << 12) ? "Yes" : "No" );
554 printf(" Fail Flag: %s\n", status
& (1 << 13) ? "Yes" : "No" );
555 printf(" Decrypt Only: %s\n", status
& (1 << 15) ? "Yes" : "No" );
556 printf(" PWD Enable: %s\n", status
& (1 << 16) ? "Yes" : "No" );
557 printf(" PWD All: %s\n", status
& (1 << 17) ? "Yes" : "No" );
558 printf(" CID EN: %s\n", status
& (1 << 18) ? "Yes" : "No" );
559 printf(" Encrypt Preamble: %s\n", status
& (1 << 21) ? "Yes" : "No" );
560 printf(" Std Preamble: %s\n", status
& (1 << 22) ? "Yes" : "No" );
561 printf(" SPIm Fail 1: %s\n", status
& (1 << 23) ? "Yes" : "No" );
563 uint8_t bse_error
= (status
& (0b1111 << 24)) >> 24;
565 case 0b0000: printf(" BSE Error Code: No Error (0b000)\n"); break;
566 case 0b0001: printf(" BSE Error Code: ID Error (0b001)\n"); break;
567 case 0b0010: printf(" BSE Error Code: CMD Error - illegal command (0b010)\n"); break;
568 case 0b0011: printf(" BSE Error Code: CRC Error (0b011)\n"); break;
569 case 0b0100: printf(" BSE Error Code: PRMB Error - preamble error (0b100)\n"); break;
570 case 0b0101: printf(" BSE Error Code: ABRT Error - configuration aborted by the user (0b101)\n"); break;
571 case 0b0110: printf(" BSE Error Code: OVFL Error - data overflow error (0b110)\n"); break;
572 case 0b0111: printf(" BSE Error Code: SDM Error - bitstream pass the size of SRAM array (0b111)\n"); break;
573 case 0b1000: printf(" BSE Error Code: Authentication Error (0b1000)\n"); break;
574 case 0b1001: printf(" BSE Error Code: Authentication Setup Error (0b1001)\n"); break;
575 case 0b1010: printf(" BSE Error Code: Bitstream Engine Timeout Error (0b1010) \n"); break;
578 printf(" Execution Error: %s\n", status
& (1 << 28) ? "Yes" : "No" );
579 printf(" ID Error: %s\n", status
& (1 << 29) ? "Yes" : "No" );
580 printf(" Invalid Command: %s\n", status
& (1 << 30) ? "Yes" : "No" );
581 printf(" WDT Busy: %s\n", status
& (1 << 31) ? "Yes" : "No" );
582 printf(" Dry Run DONE: %s\n", status
& (1UL << 33) ? "Yes" : "No" );
584 uint8_t bse_error1
= (status
& (0b1111UL
<< 34)) >> 34;
586 case 0b0000: printf(" BSE Error 1 Code: (Previous Bitstream) No Error (0b000)\n"); break;
587 case 0b0001: printf(" BSE Error 1 Code: (Previous Bitstream) ID Error (0b001)\n"); break;
588 case 0b0010: printf(" BSE Error 1 Code: (Previous Bitstream) CMD Error - illegal command (0b010)\n"); break;
589 case 0b0011: printf(" BSE Error 1 Code: (Previous Bitstream) CRC Error (0b011)\n"); break;
590 case 0b0100: printf(" BSE Error 1 Code: (Previous Bitstream) PRMB Error - preamble error (0b100)\n"); break;
591 case 0b0101: printf(" BSE Error 1 Code: (Previous Bitstream) ABRT Error - configuration aborted by the user (0b101)\n"); break;
592 case 0b0110: printf(" BSE Error 1 Code: (Previous Bitstream) OVFL Error - data overflow error (0b110)\n"); break;
593 case 0b0111: printf(" BSE Error 1 Code: (Previous Bitstream) SDM Error - bitstream pass the size of SRAM array (0b111)\n"); break;
594 case 0b1000: printf(" BSE Error 1 Code: (Previous Bitstream) Authentication Error (0b1000)\n"); break;
595 case 0b1001: printf(" BSE Error 1 Code: (Previous Bitstream) Authentication Setup Error (0b1001)\n"); break;
596 case 0b1010: printf(" BSE Error 1 Code: (Previous Bitstream) Bitstream Engine Timeout Error (0b1010) \n"); break;
599 printf(" Bypass Mode: %s\n", status
& (1UL << 38) ? "Yes" : "No" );
600 printf(" Flow Through Mode: %s\n", status
& (1UL << 39) ? "Yes" : "No" );
601 printf(" SFDP Timeout: %s\n", status
& (1UL << 42) ? "Yes" : "No" );
602 printf(" Key Destroy Pass: %s\n", status
& (1UL << 43) ? "Yes" : "No" );
603 printf(" INITN: %s\n", status
& (1UL << 44) ? "Yes" : "No" );
604 printf(" I3C Parity Error 2: %s\n", status
& (1UL << 45) ? "Yes" : "No" );
605 printf(" Init Bus ID Error: %s\n", status
& (1UL << 46) ? "Yes" : "No" );
606 printf(" I3C Parity Error 1: %s\n", status
& (1UL << 47) ? "Yes" : "No" );
608 uint8_t auth_mode
= (status
& (0b11UL
<< 48)) >> 48;
610 case 0b00: printf(" Authentication Mode: No Auth (0b00)\n"); break;
611 case 0b01: printf(" Authentication Mode: ECDSA (0b01)\n"); break;
612 case 0b10: printf(" Authentication Mode: HMAC (0b10)\n"); break;
613 case 0b11: printf(" Authentication Mode: No Auth (0b11)\n"); break;
616 printf(" Authentication Done: %s\n", status
& (1UL << 50) ? "Yes" : "No" );
617 printf(" Dry Run Authentication Done: %s\n", status
& (1UL << 51) ? "Yes" : "No" );
618 printf(" JTAG Locked: %s\n", status
& (1UL << 52) ? "Yes" : "No" );
619 printf(" SSPI Locked: %s\n", status
& (1UL << 53) ? "Yes" : "No" );
620 printf(" I2C/I3C Locked: %s\n", status
& (1UL << 54) ? "Yes" : "No" );
621 printf(" PUB Read Lock: %s\n", status
& (1UL << 55) ? "Yes" : "No" );
622 printf(" PUB Write Lock: %s\n", status
& (1UL << 56) ? "Yes" : "No" );
623 printf(" FEA Read Lock: %s\n", status
& (1UL << 57) ? "Yes" : "No" );
624 printf(" FEA Write Lock: %s\n", status
& (1UL << 58) ? "Yes" : "No" );
625 printf(" AES Read Lock: %s\n", status
& (1UL << 59) ? "Yes" : "No" );
626 printf(" AES Write Lock: %s\n", status
& (1UL << 60) ? "Yes" : "No" );
627 printf(" PWD Read Lock: %s\n", status
& (1UL << 61) ? "Yes" : "No" );
628 printf(" PWD Write Lock: %s\n", status
& (1UL << 62) ? "Yes" : "No" );
629 printf(" Global Lock: %s\n", status
& (1UL << 63) ? "Yes" : "No" );
634 static void read_status_register(){
636 uint8_t data
[8] = {LSC_READ_STATUS
};
638 jtag_go_to_state(STATE_SHIFT_IR
);
639 jtag_tap_shift(data
, data
, 8, true);
642 jtag_go_to_state(STATE_SHIFT_DR
);
643 //jtag_go_to_state(STATE_PAUSE_DR);
645 if(connected_device
.type
== TYPE_ECP5
){
646 jtag_tap_shift(data
, data
, 32, true);
649 /* Format the status into a 32bit value */
650 for(int i
= 0; i
< 4; i
++)
651 status
= data
[i
] << 24 | status
>> 8;
653 print_ecp5_status_register(status
);
654 }else if(connected_device
.type
== TYPE_NX
){
656 jtag_tap_shift(data
, data
, 64, true);
660 /* Format the status into a 32bit value */
661 for(int i
= 0; i
< 8; i
++)
662 status
= (uint64_t)data
[i
] << 56 | status
>> 8;
664 print_nx_status_register(status
);
670 static void enter_spi_background_mode(){
672 uint8_t data
[4] = {0x3A};
674 jtag_go_to_state(STATE_SHIFT_IR
);
675 jtag_tap_shift(data
, data
, 8, true);
677 /* These bytes seem to be required to un-lock the SPI interface */
680 jtag_go_to_state(STATE_SHIFT_DR
);
681 jtag_tap_shift(data
, data
, 16, true);
683 /* Entering IDLE is essential */
684 jtag_go_to_state(STATE_RUN_TEST_IDLE
);
688 void ecp_jtag_cmd(uint8_t cmd
){
689 uint8_t data
[1] = {cmd
};
691 jtag_go_to_state(STATE_SHIFT_IR
);
692 jtag_tap_shift(data
, data
, 8, true);
694 jtag_go_to_state(STATE_RUN_TEST_IDLE
);
698 void ecp_jtag_cmd8(uint8_t cmd
, uint8_t param
){
699 uint8_t data
[1] = {cmd
};
701 jtag_go_to_state(STATE_SHIFT_IR
);
702 jtag_tap_shift(data
, data
, 8, true);
705 jtag_go_to_state(STATE_SHIFT_DR
);
706 jtag_tap_shift(data
, data
, 8, true);
708 jtag_go_to_state(STATE_RUN_TEST_IDLE
);
712 // ---------------------------------------------------------
713 // iceprog implementation
714 // ---------------------------------------------------------
716 static void help(const char *progname
)
718 fprintf(stderr
, "Simple programming tool for Lattice ECP5/NX using FTDI-based JTAG programmers.\n");
719 fprintf(stderr
, "Usage: %s [-b|-n|-c] <input file>\n", progname
);
720 fprintf(stderr
, " %s -r|-R<bytes> <output file>\n", progname
);
721 fprintf(stderr
, " %s -S <input file>\n", progname
);
722 fprintf(stderr
, " %s -t\n", progname
);
723 fprintf(stderr
, "\n");
724 fprintf(stderr
, "General options:\n");
725 fprintf(stderr
, " -d <device string> use the specified USB device [default: i:0x0403:0x6010 or i:0x0403:0x6014]\n");
726 fprintf(stderr
, " d:<devicenode> (e.g. d:002/005)\n");
727 fprintf(stderr
, " i:<vendor>:<product> (e.g. i:0x0403:0x6010)\n");
728 fprintf(stderr
, " i:<vendor>:<product>:<index> (e.g. i:0x0403:0x6010:0)\n");
729 fprintf(stderr
, " s:<vendor>:<product>:<serial-string>\n");
730 fprintf(stderr
, " -I [ABCD] connect to the specified interface on the FTDI chip\n");
731 fprintf(stderr
, " [default: A]\n");
732 fprintf(stderr
, " -o <offset in bytes> start address for read/write [default: 0]\n");
733 fprintf(stderr
, " (append 'k' to the argument for size in kilobytes,\n");
734 fprintf(stderr
, " or 'M' for size in megabytes)\n");
735 fprintf(stderr
, " -k <divider> divider for SPI clock [default: 1]\n");
736 fprintf(stderr
, " clock speed is 6MHz/divider");
737 fprintf(stderr
, " -s slow SPI. (50 kHz instead of 6 MHz)\n");
738 fprintf(stderr
, " Equivalent to -k 30\n");
739 fprintf(stderr
, " -v verbose output\n");
740 fprintf(stderr
, " -i [4,32,64] select erase block size [default: 64k]\n");
741 fprintf(stderr
, "\n");
742 fprintf(stderr
, "Mode of operation:\n");
743 fprintf(stderr
, " [default] write file contents to flash, then verify\n");
744 fprintf(stderr
, " -X write file contents to flash only\n");
745 fprintf(stderr
, " -r read first 256 kB from flash and write to file\n");
746 fprintf(stderr
, " -R <size in bytes> read the specified number of bytes from flash\n");
747 fprintf(stderr
, " (append 'k' to the argument for size in kilobytes,\n");
748 fprintf(stderr
, " or 'M' for size in megabytes)\n");
749 fprintf(stderr
, " -c do not write flash, only verify (`check')\n");
750 fprintf(stderr
, " -S perform SRAM programming\n");
751 fprintf(stderr
, " -t just read the flash ID sequence\n");
752 fprintf(stderr
, "\n");
753 fprintf(stderr
, "Erase mode (only meaningful in default mode):\n");
754 fprintf(stderr
, " [default] erase aligned chunks of 64kB in write mode\n");
755 fprintf(stderr
, " This means that some data after the written data (or\n");
756 fprintf(stderr
, " even before when -o is used) may be erased as well.\n");
757 fprintf(stderr
, " -b bulk erase entire flash before writing\n");
758 fprintf(stderr
, " -e <size in bytes> erase flash as if we were writing that number of bytes\n");
759 fprintf(stderr
, " -n do not erase flash before writing\n");
760 fprintf(stderr
, " -p disable write protection before erasing or writing\n");
761 fprintf(stderr
, " This can be useful if flash memory appears to be\n");
762 fprintf(stderr
, " bricked and won't respond to erasing or programming.\n");
763 fprintf(stderr
, "\n");
764 fprintf(stderr
, "Miscellaneous options:\n");
765 fprintf(stderr
, " --help display this help and exit\n");
766 fprintf(stderr
, " -- treat all remaining arguments as filenames\n");
767 fprintf(stderr
, "\n");
768 fprintf(stderr
, "Exit status:\n");
769 fprintf(stderr
, " 0 on success,\n");
770 fprintf(stderr
, " 1 if a non-hardware error occurred (e.g., failure to read from or\n");
771 fprintf(stderr
, " write to a file, or invoked with invalid options),\n");
772 fprintf(stderr
, " 2 if communication with the hardware failed (e.g., cannot find the\n");
773 fprintf(stderr
, " iCE FTDI USB device),\n");
774 fprintf(stderr
, " 3 if verification of the data failed.\n");
775 fprintf(stderr
, "\n");
776 fprintf(stderr
, "If you have a bug report, please file an issue on github:\n");
777 fprintf(stderr
, " https://github.com/gregdavill/ecpprog/issues\n");
780 int main(int argc
, char **argv
)
782 /* used for error reporting */
783 const char *my_name
= argv
[0];
784 for (size_t i
= 0; argv
[0][i
]; i
++)
785 if (argv
[0][i
] == '/')
786 my_name
= argv
[0] + i
+ 1;
788 int read_size
= 256 * 1024;
789 int erase_block_size
= 64;
794 bool read_mode
= false;
795 bool check_mode
= false;
796 bool erase_mode
= false;
797 bool bulk_erase
= false;
798 bool dont_erase
= false;
799 bool prog_sram
= false;
800 bool test_mode
= false;
801 bool disable_protect
= false;
802 bool disable_verify
= false;
803 const char *filename
= NULL
;
804 const char *devstr
= NULL
;
808 _setmode(_fileno(stdin
), _O_BINARY
);
809 _setmode(_fileno(stdout
), _O_BINARY
);
812 static struct option long_options
[] = {
813 {"help", no_argument
, NULL
, -2},
817 /* Decode command line parameters */
820 while ((opt
= getopt_long(argc
, argv
, "d:i:I:rR:e:o:k:scbnStvpX", long_options
, NULL
)) != -1) {
822 case 'd': /* device string */
825 case 'i': /* block erase size */
826 if (!strcmp(optarg
, "4"))
827 erase_block_size
= 4;
828 else if (!strcmp(optarg
, "32"))
829 erase_block_size
= 32;
830 else if (!strcmp(optarg
, "64"))
831 erase_block_size
= 64;
833 fprintf(stderr
, "%s: `%s' is not a valid erase block size (must be `4', `32' or `64')\n", my_name
, optarg
);
837 case 'I': /* FTDI Chip interface select */
838 if (!strcmp(optarg
, "A"))
840 else if (!strcmp(optarg
, "B"))
842 else if (!strcmp(optarg
, "C"))
844 else if (!strcmp(optarg
, "D"))
847 fprintf(stderr
, "%s: `%s' is not a valid interface (must be `A', `B', `C', or `D')\n", my_name
, optarg
);
851 case 'r': /* Read 256 bytes to file */
854 case 'R': /* Read n bytes to file */
856 read_size
= strtol(optarg
, &endptr
, 0);
859 else if (!strcmp(endptr
, "k"))
861 else if (!strcmp(endptr
, "M"))
862 read_size
*= 1024 * 1024;
864 fprintf(stderr
, "%s: `%s' is not a valid size\n", my_name
, optarg
);
868 case 'e': /* Erase blocks as if we were writing n bytes */
870 erase_size
= strtol(optarg
, &endptr
, 0);
873 else if (!strcmp(endptr
, "k"))
875 else if (!strcmp(endptr
, "M"))
876 erase_size
*= 1024 * 1024;
878 fprintf(stderr
, "%s: `%s' is not a valid size\n", my_name
, optarg
);
882 case 'o': /* set address offset */
883 rw_offset
= strtol(optarg
, &endptr
, 0);
886 else if (!strcmp(endptr
, "k"))
888 else if (!strcmp(endptr
, "M"))
889 rw_offset
*= 1024 * 1024;
891 fprintf(stderr
, "%s: `%s' is not a valid offset\n", my_name
, optarg
);
895 case 'k': /* set clock div */
896 clkdiv
= strtol(optarg
, &endptr
, 0);
897 if (clkdiv
< 1 || clkdiv
> 65536) {
898 fprintf(stderr
, "%s: clock divider must be in range 1-65536 `%s' is not a valid divider\n", my_name
, optarg
);
902 case 's': /* use slow SPI clock */
905 case 'c': /* do not write just check */
908 case 'b': /* bulk erase before writing */
911 case 'n': /* do not erase before writing */
914 case 'S': /* write to sram directly */
917 case 't': /* just read flash id */
920 case 'v': /* provide verbose output */
923 case 'p': /* disable flash protect before erase/write */
924 disable_protect
= true;
926 case 'X': /* disable verification */
927 disable_verify
= true;
933 /* error message has already been printed */
934 fprintf(stderr
, "Try `%s --help' for more information.\n", argv
[0]);
939 /* Make sure that the combination of provided parameters makes sense */
941 if (read_mode
+ erase_mode
+ check_mode
+ prog_sram
+ test_mode
> 1) {
942 fprintf(stderr
, "%s: options `-r'/`-R', `-e`, `-c', `-S', and `-t' are mutually exclusive\n", my_name
);
946 if (bulk_erase
&& dont_erase
) {
947 fprintf(stderr
, "%s: options `-b' and `-n' are mutually exclusive\n", my_name
);
951 if (disable_protect
&& (read_mode
|| check_mode
|| prog_sram
|| test_mode
)) {
952 fprintf(stderr
, "%s: option `-p' only valid in programming mode\n", my_name
);
956 if (bulk_erase
&& (read_mode
|| check_mode
|| prog_sram
|| test_mode
)) {
957 fprintf(stderr
, "%s: option `-b' only valid in programming mode\n", my_name
);
961 if (dont_erase
&& (read_mode
|| check_mode
|| prog_sram
|| test_mode
)) {
962 fprintf(stderr
, "%s: option `-n' only valid in programming mode\n", my_name
);
966 if (rw_offset
!= 0 && prog_sram
) {
967 fprintf(stderr
, "%s: option `-o' not supported in SRAM mode\n", my_name
);
971 if (rw_offset
!= 0 && test_mode
) {
972 fprintf(stderr
, "%s: option `-o' not supported in test mode\n", my_name
);
976 if (optind
+ 1 == argc
) {
978 fprintf(stderr
, "%s: test mode doesn't take a file name\n", my_name
);
979 fprintf(stderr
, "Try `%s --help' for more information.\n", argv
[0]);
982 filename
= argv
[optind
];
983 } else if (optind
!= argc
) {
984 fprintf(stderr
, "%s: too many arguments\n", my_name
);
985 fprintf(stderr
, "Try `%s --help' for more information.\n", argv
[0]);
987 } else if (bulk_erase
|| disable_protect
) {
988 filename
= "/dev/null";
989 } else if (!test_mode
&& !erase_mode
&& !disable_protect
) {
990 fprintf(stderr
, "%s: missing argument\n", my_name
);
991 fprintf(stderr
, "Try `%s --help' for more information.\n", argv
[0]);
995 /* open input/output file in advance
996 so we can fail before initializing the hardware */
1003 } else if (erase_mode
) {
1004 file_size
= erase_size
;
1005 } else if (read_mode
) {
1006 f
= (strcmp(filename
, "-") == 0) ? stdout
: fopen(filename
, "wb");
1008 fprintf(stderr
, "%s: can't open '%s' for writing: ", my_name
, filename
);
1010 return EXIT_FAILURE
;
1012 file_size
= read_size
;
1014 f
= (strcmp(filename
, "-") == 0) ? stdin
: fopen(filename
, "rb");
1016 fprintf(stderr
, "%s: can't open '%s' for reading: ", my_name
, filename
);
1018 return EXIT_FAILURE
;
1021 /* For regular programming, we need to read the file
1022 twice--once for programming and once for verifying--and
1023 need to know the file size in advance in order to erase
1024 the correct amount of memory.
1026 See if we can seek on the input file. Checking for "-"
1027 as an argument isn't enough as we might be reading from a
1028 named pipe, or contrarily, the standard input may be an
1032 if (fseek(f
, 0L, SEEK_END
) != -1) {
1033 file_size
= ftell(f
);
1034 if (file_size
== -1) {
1035 fprintf(stderr
, "%s: %s: ftell: ", my_name
, filename
);
1037 return EXIT_FAILURE
;
1039 if (fseek(f
, 0L, SEEK_SET
) == -1) {
1040 fprintf(stderr
, "%s: %s: fseek: ", my_name
, filename
);
1042 return EXIT_FAILURE
;
1049 fprintf(stderr
, "%s: can't open temporary file\n", my_name
);
1050 return EXIT_FAILURE
;
1055 static unsigned char buffer
[4096];
1056 size_t rc
= fread(buffer
, 1, 4096, pipe
);
1059 size_t wc
= fwrite(buffer
, 1, rc
, f
);
1061 fprintf(stderr
, "%s: can't write to temporary file\n", my_name
);
1062 return EXIT_FAILURE
;
1068 /* now seek to the beginning so we can
1069 start reading again */
1070 fseek(f
, 0, SEEK_SET
);
1075 // ---------------------------------------------------------
1076 // Initialize USB connection to FT2232H
1077 // ---------------------------------------------------------
1079 fprintf(stderr
, "init..\n");
1080 jtag_init(ifnum
, devstr
, clkdiv
);
1083 read_status_register();
1087 /* Reset ECP5 to release SPI interface */
1088 ecp_jtag_cmd8(ISC_ENABLE
,0);
1090 ecp_jtag_cmd8(ISC_ERASE
,0);
1092 ecp_jtag_cmd(ISC_DISABLE
);
1094 /* Put device into SPI bypass mode */
1095 enter_spi_background_mode();
1100 flash_read_status();
1104 // ---------------------------------------------------------
1106 // ---------------------------------------------------------
1107 fprintf(stderr
, "reset..\n");
1109 ecp_jtag_cmd8(ISC_ENABLE
, 0);
1110 ecp_jtag_cmd8(ISC_ERASE
, 0);
1111 ecp_jtag_cmd8(LSC_RESET_CRC
, 0);
1113 read_status_register();
1115 // ---------------------------------------------------------
1117 // ---------------------------------------------------------
1119 fprintf(stderr
, "programming..\n");
1120 ecp_jtag_cmd(LSC_BITSTREAM_BURST
);
1122 const uint32_t len
= 16*1024;
1123 static unsigned char buffer
[16*1024];
1124 int rc
= fread(buffer
, 1, len
, f
);
1128 fprintf(stderr
, "sending %d bytes.\n", rc
);
1130 for(int i
= 0; i
< rc
; i
++){
1131 buffer
[i
] = bit_reverse(buffer
[i
]);
1134 jtag_go_to_state(STATE_CAPTURE_DR
);
1135 jtag_tap_shift(buffer
, buffer
, rc
*8, false);
1138 ecp_jtag_cmd(ISC_DISABLE
);
1139 read_status_register();
1141 else /* program flash */
1143 // ---------------------------------------------------------
1145 // ---------------------------------------------------------
1147 fprintf(stderr
, "reset..\n");
1148 /* Reset ECP5 to release SPI interface */
1149 ecp_jtag_cmd8(ISC_ENABLE
, 0);
1150 ecp_jtag_cmd8(ISC_ERASE
, 0);
1151 ecp_jtag_cmd8(ISC_DISABLE
, 0);
1153 /* Put device into SPI bypass mode */
1154 enter_spi_background_mode();
1161 // ---------------------------------------------------------
1163 // ---------------------------------------------------------
1165 if (!read_mode
&& !check_mode
)
1167 if (disable_protect
)
1169 flash_write_enable();
1170 flash_disable_protection();
1177 flash_write_enable();
1183 fprintf(stderr
, "file size: %ld\n", file_size
);
1185 int block_size
= erase_block_size
<< 10;
1186 int block_mask
= block_size
- 1;
1187 int begin_addr
= rw_offset
& ~block_mask
;
1188 int end_addr
= (rw_offset
+ file_size
+ block_mask
) & ~block_mask
;
1190 for (int addr
= begin_addr
; addr
< end_addr
; addr
+= block_size
) {
1191 flash_write_enable();
1192 switch(erase_block_size
) {
1194 flash_4kB_sector_erase(addr
);
1197 flash_32kB_sector_erase(addr
);
1200 flash_64kB_sector_erase(addr
);
1204 fprintf(stderr
, "Status after block erase:\n");
1205 flash_read_status();
1214 for (int rc
, addr
= 0; true; addr
+= rc
) {
1215 uint8_t buffer
[256];
1218 fprintf(stderr
, "\r\033[0Kprogramming.. %04u/%04lu", addr
, file_size
);
1220 int page_size
= 256 - (rw_offset
+ addr
) % 256;
1221 rc
= fread(buffer
, 1, page_size
, f
);
1224 flash_write_enable();
1225 flash_prog(rw_offset
+ addr
, buffer
, rc
);
1230 fprintf(stderr
, "\n");
1231 /* seek to the beginning for second pass */
1232 fseek(f
, 0, SEEK_SET
);
1236 // ---------------------------------------------------------
1238 // ---------------------------------------------------------
1242 flash_start_read(rw_offset
);
1243 for (int addr
= 0; addr
< read_size
; addr
+= 4096) {
1244 uint8_t buffer
[4096];
1247 fprintf(stderr
, "\r\033[0Kreading.. %04u/%04u", addr
+ 4096, read_size
);
1249 flash_continue_read(buffer
, 4096);
1250 fwrite(buffer
, read_size
- addr
> 4096 ? 4096 : read_size
- addr
, 1, f
);
1252 fprintf(stderr
, "\n");
1253 } else if (!erase_mode
&& !disable_verify
) {
1255 flash_start_read(rw_offset
);
1256 for (int addr
= 0; addr
< file_size
; addr
+= 4096) {
1257 uint8_t buffer_flash
[4096], buffer_file
[4096];
1259 int rc
= fread(buffer_file
, 1, 4096, f
);
1263 flash_continue_read(buffer_flash
, rc
);
1266 fprintf(stderr
, "\r\033[0Kverify.. %04u/%04lu", addr
+ rc
, file_size
);
1267 if (memcmp(buffer_file
, buffer_flash
, rc
)) {
1268 fprintf(stderr
, "Found difference between flash and file!\n");
1273 fprintf(stderr
, " VERIFY OK\n");
1277 if (f
!= NULL
&& f
!= stdin
&& f
!= stdout
)
1280 // ---------------------------------------------------------
1282 // ---------------------------------------------------------
1284 fprintf(stderr
, "Bye.\n");