2 * Code adapted from Arduino-JTAG;
3 * portions copyright (c) 2015 Marcelo Roberto Jimenez <marcelo.jimenez (at) gmail (dot) com>.
4 * portions copyright (c) 2019 Katherine J. Temkin <kate@ktemkin.com>
5 * portions copyright (c) 2019 Great Scott Gadgets <ktemkin@greatscottgadgets.com>
19 void jtag_state_ack(bool tms
);
22 * Low nibble : TMS == 0
23 * High nibble: TMS == 1
26 #define TMS_T(TMS_HIGH_STATE, TMS_LOW_STATE) (((TMS_HIGH_STATE) << 4) | (TMS_LOW_STATE))
28 static const uint8_t tms_transitions
[] = {
29 /* STATE_TEST_LOGIC_RESET */ TMS_T(STATE_TEST_LOGIC_RESET
, STATE_RUN_TEST_IDLE
),
30 /* STATE_RUN_TEST_IDLE */ TMS_T(STATE_SELECT_DR_SCAN
, STATE_RUN_TEST_IDLE
),
31 /* STATE_SELECT_DR_SCAN */ TMS_T(STATE_SELECT_IR_SCAN
, STATE_CAPTURE_DR
),
32 /* STATE_CAPTURE_DR */ TMS_T(STATE_EXIT1_DR
, STATE_SHIFT_DR
),
33 /* STATE_SHIFT_DR */ TMS_T(STATE_EXIT1_DR
, STATE_SHIFT_DR
),
34 /* STATE_EXIT1_DR */ TMS_T(STATE_UPDATE_DR
, STATE_PAUSE_DR
),
35 /* STATE_PAUSE_DR */ TMS_T(STATE_EXIT2_DR
, STATE_PAUSE_DR
),
36 /* STATE_EXIT2_DR */ TMS_T(STATE_UPDATE_DR
, STATE_SHIFT_DR
),
37 /* STATE_UPDATE_DR */ TMS_T(STATE_SELECT_DR_SCAN
, STATE_RUN_TEST_IDLE
),
38 /* STATE_SELECT_IR_SCAN */ TMS_T(STATE_TEST_LOGIC_RESET
, STATE_CAPTURE_IR
),
39 /* STATE_CAPTURE_IR */ TMS_T(STATE_EXIT1_IR
, STATE_SHIFT_IR
),
40 /* STATE_SHIFT_IR */ TMS_T(STATE_EXIT1_IR
, STATE_SHIFT_IR
),
41 /* STATE_EXIT1_IR */ TMS_T(STATE_UPDATE_IR
, STATE_PAUSE_IR
),
42 /* STATE_PAUSE_IR */ TMS_T(STATE_EXIT2_IR
, STATE_PAUSE_IR
),
43 /* STATE_EXIT2_IR */ TMS_T(STATE_UPDATE_IR
, STATE_SHIFT_IR
),
44 /* STATE_UPDATE_IR */ TMS_T(STATE_SELECT_DR_SCAN
, STATE_RUN_TEST_IDLE
),
47 #define BITSTR(A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P) ( \
48 ((uint16_t)(A) << 15) | \
49 ((uint16_t)(B) << 14) | \
50 ((uint16_t)(C) << 13) | \
51 ((uint16_t)(D) << 12) | \
52 ((uint16_t)(E) << 11) | \
53 ((uint16_t)(F) << 10) | \
54 ((uint16_t)(G) << 9) | \
55 ((uint16_t)(H) << 8) | \
56 ((uint16_t)(I) << 7) | \
57 ((uint16_t)(J) << 6) | \
58 ((uint16_t)(K) << 5) | \
59 ((uint16_t)(L) << 4) | \
60 ((uint16_t)(M) << 3) | \
61 ((uint16_t)(N) << 2) | \
62 ((uint16_t)(O) << 1) | \
63 ((uint16_t)(P) << 0) )
66 * The index of this vector is the current state. The i-th bit tells you the
67 * value TMS must assume in order to go to state "i".
69 ------------------------------------------------------------------------------------------------------------
70 | | || F | E | D | C || B | A | 9 | 8 || 7 | 6 | 5 | 4 || 3 | 2 | 1 | 0 || HEX |
71 ------------------------------------------------------------------------------------------------------------
72 | STATE_TEST_LOGIC_RESET | 0 || 0 | 0 | 0 | 0 || 0 | 0 | 0 | 0 || 0 | 0 | 0 | 0 || 0 | 0 | 0 | 1 || 0x0001 |
73 | STATE_RUN_TEST_IDLE | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 0 | 1 || 0xFFFD |
74 | STATE_SELECT_DR_SCAN | 2 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 0 || 0 | 0 | 0 | 0 || 0 | x | 1 | 1 || 0xFE03 |
75 | STATE_CAPTURE_DR | 3 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 0 || x | 1 | 1 | 1 || 0xFFE7 |
76 | STATE_SHIFT_DR | 4 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 0 || 1 | 1 | 1 | 1 || 0xFFEF |
77 | STATE_EXIT1_DR | 5 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 0 | 0 | x | 0 || 1 | 1 | 1 | 1 || 0xFF0F |
78 | STATE_PAUSE_DR | 6 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 0 | 1 | 1 || 1 | 1 | 1 | 1 || 0xFFBF |
79 | STATE_EXIT2_DR | 7 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || x | 0 | 0 | 0 || 1 | 1 | 1 | 1 || 0xFF0F |
80 | STATE_UPDATE_DR | 8 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | x || 1 | 1 | 1 | 1 || 1 | 1 | 0 | 1 || 0xFEFD |
81 | STATE_SELECT_IR_SCAN | 9 || 0 | 0 | 0 | 0 || 0 | 0 | x | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 0x01FF |
82 | STATE_CAPTURE_IR | A || 1 | 1 | 1 | 1 || 0 | x | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 0xF3FF |
83 | STATE_SHIFT_IR | B || 1 | 1 | 1 | 1 || 0 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 0xF7FF |
84 | STATE_EXIT1_IR | C || 1 | 0 | 0 | x || 0 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 0x87FF |
85 | STATE_PAUSE_IR | D || 1 | 1 | 0 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 0xDFFF |
86 | STATE_EXIT2_IR | E || 1 | x | 0 | 0 || 0 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 0x87FF |
87 | STATE_UPDATE_IR | F || x | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 1 | 1 || 1 | 1 | 0 | 1 || 0x7FFD |
88 ------------------------------------------------------------------------------------------------------------
91 static const uint16_t tms_map
[] = {
92 /* STATE_TEST_LOGIC_RESET */ BITSTR( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 ),
93 /* STATE_RUN_TEST_IDLE */ BITSTR( 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1 ),
94 /* STATE_SELECT_DR_SCAN */ BITSTR( 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1 ),
95 /* STATE_CAPTURE_DR */ BITSTR( 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1 ),
96 /* STATE_SHIFT_DR */ BITSTR( 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1 ),
97 /* STATE_EXIT1_DR */ BITSTR( 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1 ),
98 /* STATE_PAUSE_DR */ BITSTR( 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1 ),
99 /* STATE_EXIT2_DR */ BITSTR( 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1 ),
100 /* STATE_UPDATE_DR */ BITSTR( 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1 ),
101 /* STATE_SELECT_IR_SCAN */ BITSTR( 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 ),
102 /* STATE_CAPTURE_IR */ BITSTR( 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ),
103 /* STATE_SHIFT_IR */ BITSTR( 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ),
104 /* STATE_EXIT1_IR */ BITSTR( 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ),
105 /* STATE_PAUSE_IR */ BITSTR( 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ),
106 /* STATE_EXIT2_IR */ BITSTR( 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ),
107 /* STATE_UPDATE_IR */ BITSTR( 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1 ),
110 static uint8_t current_state
;
112 uint8_t jtag_current_state(void)
114 return current_state
;
117 void jtag_set_current_state(uint8_t state
)
119 current_state
= state
;
122 void jtag_error(int status
){
131 * Performs any start-of-day tasks necessary to talk JTAG to our FPGA.
133 void jtag_init(int ifnum
, const char *devstr
, bool slow_clock
)
135 mpsse_init(ifnum
, devstr
, slow_clock
);
137 jtag_set_current_state(STATE_TEST_LOGIC_RESET
);
138 jtag_go_to_state(STATE_TEST_LOGIC_RESET
);
141 uint8_t data
[32*1024];
145 extern struct ftdi_context mpsse_ftdic
;
147 static inline void jtag_pulse_clock_and_read_tdo(bool tms
, bool tdi
)
149 *ptr
++ = MC_DATA_TMS
| MC_DATA_IN
| MC_DATA_LSB
| MC_DATA_BITS
| MC_DATA_OCN
;
151 *ptr
++ = (tdi
? 0x80 : 0) | (tms
? 0x01 : 0);
155 static void _jtag_tap_shift(
157 uint8_t *output_data
,
162 //printf("_jtag_tap_shift(0x%08x,0x%08x,%u,%s);\n",input_data, output_data, data_bits, must_end ? "true" : "false");
163 uint32_t bit_count
= data_bits
;
164 uint32_t byte_count
= (data_bits
+ 7) / 8;
168 for (uint32_t i
= 0; i
< byte_count
; ++i
) {
169 uint8_t byte_out
= input_data
[i
];
170 for (int j
= 0; j
< 8 && bit_count
-- > 0; ++j
) {
172 if (bit_count
== 0 && must_end
) {
176 jtag_pulse_clock_and_read_tdo(tms
, byte_out
& 1);
181 mpsse_xfer(data
, ptr
-data
, rx_cnt
);
183 /* Data out from the FTDI is actually from an internal shift register
184 * Instead of reconstructing the bitpattern, we can just take every 8th byte.*/
185 for(int i
= 0; i
< rx_cnt
/8; i
++)
186 output_data
[i
] = data
[7+i
*8];
190 static void jtag_shift_bytes(
192 uint8_t *output_data
,
198 if(data_bits
% 8 != 0){
199 printf("Error %u is not a byte multiple\n", data_bits
);
201 //printf("jtag_shift_bytes(0x%08x,0x%08x,%u,%s);\n",input_data, output_data, data_bits, must_end ? "true" : "false");
202 uint32_t byte_count
= data_bits
/ 8;
206 data
[0] = MC_DATA_OUT
| MC_DATA_IN
| MC_DATA_LSB
| MC_DATA_OCN
;
207 data
[1] = (byte_count
- 1);
208 data
[2] = (byte_count
- 1) >> 8;
209 memcpy(data
+ 3, input_data
, byte_count
);
211 mpsse_xfer(data
, byte_count
+ 3, byte_count
);
213 memcpy(output_data
, data
, byte_count
);
217 #define MIN(a,b) ((a) < (b)) ? (a) : (b)
221 uint8_t *output_data
,
225 /* if 'must_end' the send last byte seperately
226 * This way we toggle TMS on the last clock cycle */
230 uint32_t data_bits_sent
= 0;
232 while(data_bits_sent
!= data_bits
){
234 uint32_t _data_bits
= MIN(4096 + 2048, data_bits
- data_bits_sent
);
237 input_data
+ data_bits_sent
/8,
238 output_data
+ data_bits_sent
/8,
242 data_bits_sent
+= _data_bits
;
246 /* Send our last byte */
249 input_data
+ data_bits_sent
/8,
250 output_data
+ data_bits_sent
/8,
257 void jtag_state_ack(bool tms
)
260 jtag_set_current_state((tms_transitions
[jtag_current_state()] >> 4) & 0xf);
262 jtag_set_current_state(tms_transitions
[jtag_current_state()] & 0xf);
266 void jtag_go_to_state(unsigned state
)
269 if (state
== STATE_TEST_LOGIC_RESET
) {
270 for (int i
= 0; i
< 5; ++i
) {
271 jtag_state_ack(true);
275 MC_DATA_TMS
| MC_DATA_LSB
| MC_DATA_BITS
,
279 mpsse_xfer(data
, 3, 0);
282 while (jtag_current_state() != state
) {
284 MC_DATA_TMS
| MC_DATA_LSB
| MC_DATA_ICN
| MC_DATA_BITS
,
286 (tms_map
[jtag_current_state()] >> state
) & 1
289 jtag_state_ack((tms_map
[jtag_current_state()] >> state
) & 1);
290 mpsse_xfer(data
, 3, 0);
295 void jtag_wait_time(uint32_t microseconds
)
297 uint16_t bytes
= microseconds
/ 8;
298 uint8_t remain
= microseconds
% 8;
305 mpsse_xfer(data
, 3, 0);
310 mpsse_xfer(data
, 2, 0);