cd26b737e630bd54af2bdabef8398fe3c9693b76
[gram.git] / examples / firmware / main.c
1 #include <stdlib.h>
2 #include <stdint.h>
3 #include <gram.h>
4
5 static inline uint32_t read32(const void *addr)
6 {
7 return *(volatile uint32_t *)addr;
8 }
9
10 static inline void write32(void *addr, uint32_t value)
11 {
12 *(volatile uint32_t *)addr = value;
13 }
14
15 struct uart_regs {
16 uint32_t divisor;
17 uint32_t rx_data;
18 uint32_t rx_rdy;
19 uint32_t rx_err;
20 uint32_t tx_data;
21 uint32_t tx_rdy;
22 uint32_t zero0; // reserved
23 uint32_t zero1; // reserved
24 uint32_t ev_status;
25 uint32_t ev_pending;
26 uint32_t ev_enable;
27 };
28
29 void uart_write(char c)
30 {
31 struct uart_regs *regs = 0x2000;
32 while (!read32(&regs->tx_rdy));
33 write32(&regs->tx_data, c);
34 }
35
36 void uart_writestr(const char *c) {
37 while (*c) {
38 uart_write(*c);
39 c++;
40 }
41 }
42
43 void memcpy(void *dest, void *src, size_t n) {
44 int i;
45 //cast src and dest to char*
46 char *src_char = (char *)src;
47 char *dest_char = (char *)dest;
48 for (i=0; i<n; i++)
49 dest_char[i] = src_char[i]; //copy contents byte by byte
50 }
51
52 void uart_writeuint32(uint32_t val) {
53 const char lut[] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
54 uint8_t *val_arr = &val;
55 size_t i;
56
57 for (i = 0; i < 4; i++) {
58 uart_write(lut[(val_arr[3-i] >> 4) & 0xF]);
59 uart_write(lut[val_arr[3-i] & 0xF]);
60 }
61 }
62
63 void isr(void) {
64
65 }
66
67 int main(void) {
68 const int kNumIterations = 65536;
69 int res, failcnt = 0;
70 uart_writestr("Firmware launched...\n");
71
72 uart_writestr("DRAM init... ");
73 struct gramCtx ctx;
74 struct gramProfile profile = {
75 .mode_registers = {
76 0x320, 0x6, 0x200, 0x0
77 },
78 .rdly_p0 = 2,
79 .rdly_p1 = 2,
80 };
81 struct gramProfile profile2;
82 gram_init(&ctx, &profile, (void*)0x10000000, (void*)0x00009000, (void*)0x00008000);
83 uart_writestr("done\n");
84
85 uart_writestr("Auto calibrating... ");
86 res = gram_generate_calibration(&ctx, &profile2);
87 if (res != GRAM_ERR_NONE) {
88 uart_writestr("failed\n");
89 gram_load_calibration(&ctx, &profile);
90 } else {
91 gram_load_calibration(&ctx, &profile2);
92 }
93 uart_writestr("done\n");
94
95 uart_writestr("Auto calibration profile:");
96 uart_writestr("p0 rdly:");
97 uart_writeuint32(profile2.rdly_p0);
98 uart_writestr(" p1 rdly:");
99 uart_writeuint32(profile2.rdly_p1);
100 uart_writestr("\n");
101
102 uart_writestr("DRAM test... \n");
103 volatile uint32_t *ram = 0x10000000;
104 for (size_t i = 0; i < kNumIterations; i++) {
105 ram[i] = 0xDEAF0000 | i*4;
106 }
107
108 for (size_t i = 0; i < kNumIterations; i++) {
109 if (ram[i] != (0xDEAF0000 | i*4)) {
110 uart_writestr("fail : *(0x");
111 uart_writeuint32(&ram[i]);
112 uart_writestr(") = ");
113 uart_writeuint32(ram[i]);
114 uart_write('\n');
115 failcnt++;
116
117 if (failcnt > 10) {
118 uart_writestr("Test canceled (more than 10 errors)\n");
119 break;
120 }
121 }
122 }
123 uart_writestr("done\n");
124
125 while (1);
126
127 return 0;
128 }