3 # full core build including QTY 4of 4k SRAMs: please remember to alter
4 # doDesign.py before running!
5 # change the settings to the larger chip/corona size
6 echo "remember to check doDesign core size"
7 echo "also use yosys 049e3abf9"
9 # initialise/update the pinmux submodule
10 git submodule update
--init --recursive
12 # makes symlinks to alliance
15 # generates the io pads needed for ioring.py
22 # copies over a "full" core
23 #cp non_generated/full_core_4_4ksram_ls180.il ls180.il
24 cp non_generated
/full_core_4_4ksram_ls180.v ls180.v
25 cp non_generated
/full_core_4_4ksram_litex_ls180.v litex_ls180.v
26 cp non_generated
/full_core_4_4ksram_libresoc.v libresoc.v
27 cp non_generated
/spblock
*.v .
28 cp non_generated
/spblock
*.vbe .
29 cp non_generated
/pll.v .
37 # make the vst from verilog