2 LOGICAL_SYNTHESIS
= Yosys
3 PHYSICAL_SYNTHESIS
= Coriolis
4 DESIGN_KIT
= FlexLib018
7 YOSYS_BLACKBOXES
= pll \
15 VST_FLAGS
= --vst-uniquify-uppercase
17 #NETLISTS = $(shell cat cells.lst)
18 NETLISTS
= ls180 libresoc
19 # YOSYS_FLATTEN = $(shell cat flatten.lst)
21 include .
/mk
/design-flow.mk
24 -$(call scl_cols
,$(call c2env
, cgt
-tV
--script
=doDesign
))
29 (cd coriolis2
&& python ..
/..
/..
/pinmux
/src
/pinmux_generator.py
-v
-s ls180
-o ls180
)
30 ln
-f
-s ..
/..
/..
/pinmux
/src
/parse.py coriolis2
/pinparse.py
31 ln
-f
-s coriolis2
/ls180 ls180
45 gds_flat
: chip_r_flat.gds