rs6000: Enable vec_insert for P8 with rs6000_expand_vector_set_var_p8 [PR98093]
[gcc.git] / gcc / testsuite / gcc.target / powerpc / fold-vec-insert-char-p9.c
1 /* Verify that overloaded built-ins for vec_insert () with char
2 inputs produce the right codegen. */
3
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_p9vector_ok } */
6 /* { dg-options "-O2 -mdejagnu-cpu=power9" } */
7
8 /* The below contains vec_insert () calls with both variable and constant
9 values. Only the constant value calls are early-gimple folded, but all
10 are tested for coverage. */
11
12 #include <altivec.h>
13
14 vector bool char testub_var (unsigned char x, vector bool char v, signed int i)
15 {
16 return vec_insert (x, v, i);
17 }
18 vector signed char testss_var (signed char x, vector signed char v, signed int i)
19 {
20 return vec_insert (x, v, i);
21 }
22 vector unsigned char testsu_var (signed char x, vector unsigned char v, signed int i)
23 {
24 return vec_insert (x, v, i);
25 }
26 vector unsigned char testuu_var (unsigned char x, vector unsigned char v, signed int i)
27 {
28 return vec_insert (x, v, i);
29 }
30 vector bool char testub_cst (unsigned char x, vector bool char v)
31 {
32 return vec_insert (x, v, 12);
33 }
34 vector signed char testss_cst (signed char x, vector signed char v)
35 {
36 return vec_insert (x, v, 12);
37 }
38 vector unsigned char testsu_cst (signed char x, vector unsigned char v)
39 {
40 return vec_insert (x, v, 12);
41 }
42 vector unsigned char testuu_cst (unsigned char x, vector unsigned char v)
43 {
44 return vec_insert (x, v, 12);
45 }
46
47 /* no store per _var test. */
48 /* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 0 { target lp64 } } } */
49 /* { dg-final { scan-assembler-times {\mstb\M} 0 { target lp64 } } } */
50 /* { dg-final { scan-assembler-times {\mlvebx\M|\mlxv\M|\mlvx\M} 0 { target lp64} } } */
51 /* an insert and a move per constant test. */
52 /* { dg-final { scan-assembler-times {\mmtvsrwz\M} 8 { target lp64 } } } */
53 /* { dg-final { scan-assembler-times {\mvinsertb\M} 8 { target lp64 } } } */
54
55 /* -m32 codegen. */
56 /* { dg-final { scan-assembler-times {\mrlwinm\M} 4 { target ilp32 } } } */
57 /* { dg-final { scan-assembler-times {\madd\M} 4 { target ilp32 } } } */
58 /* { dg-final { scan-assembler-times {\mstxv\M} 4 { target ilp32 } } } */
59 /* { dg-final { scan-assembler-times {\mstb\M} 8 { target ilp32 } } } */
60 /* { dg-final { scan-assembler-times {\mlxv\M} 8 { target ilp32 } } } */
61 /* { dg-final { scan-assembler-times {\mlvebx\M} 4 { target ilp32 } } } */
62 /* { dg-final { scan-assembler-times {\mvperm\M} 4 { target ilp32 } } } */