rs6000: Enable vec_insert for P8 with rs6000_expand_vector_set_var_p8 [PR98093]
[gcc.git] / gcc / testsuite / gcc.target / powerpc / fold-vec-insert-float-p9.c
1 /* Verify that overloaded built-ins for vec_insert with float
2 inputs produce the right codegen. Power9 variant. */
3
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_p9vector_ok } */
6 /* { dg-options "-O2 -mdejagnu-cpu=power9" } */
7
8 #include <altivec.h>
9
10 vector float
11 testf_var (float f, vector float vf, signed int i)
12 {
13 return vec_insert (f, vf, i);
14 }
15
16 vector float
17 testf_cst (float f, vector float vf)
18 {
19 return vec_insert (f, vf, 12);
20 }
21
22 /* var test has a load and store. */
23 /* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 0 { target lp64 } } } */
24 /* { dg-final { scan-assembler-times {\mstfsx\M} 0 { target lp64} } } */
25
26 /* cst test have a xscvdpspn,xxextractuw,xxinsertw combo */
27 /* { dg-final { scan-assembler-times {\mxscvdpspn\M} 2 { target lp64 } } } */
28 /* { dg-final { scan-assembler-times {\mxxextractuw\M} 2 { target lp64 } } } */
29 /* { dg-final { scan-assembler-times {\mxxinsertw\M} 2 { target lp64 } } } */
30
31 /* { dg-final { scan-assembler-times {\mstfs\M} 2 { target ilp32 } } } */
32 /* { dg-final { scan-assembler-times {\mlxv\M} 2 { target ilp32 } } } */
33 /* { dg-final { scan-assembler-times {\mlvewx\M} 1 { target ilp32 } } } */
34 /* { dg-final { scan-assembler-times {\mvperm\M} 1 { target ilp32 } } } */