gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c

   1 /* Verify that overloaded built-ins for vec_insert() with long long
   2    inputs produce the right codegen.  */
   3
   4 /* { dg-do compile } */
   5 /* { dg-require-effective-target powerpc_p8vector_ok } */
   6 /* { dg-options "-O2 -mdejagnu-cpu=power8" } */
   7
   8 #include <altivec.h>
   9
  10 vector bool long long
  11 testbl_var(unsigned long long x, vector bool long long v, signed int i)
  12 {
  13    return vec_insert(x, v, i);
  14 }
  15
  16 vector signed long long
  17 testsl_var(signed long long x, vector signed long long v, signed int i)
  18 {
  19    return vec_insert(x, v, i);
  20 }
  21
  22 vector unsigned long long
  23 testul1_var(signed long long x, vector unsigned long long v, signed int i)
  24 {
  25    return vec_insert(x, v, i);
  26 }
  27
  28 vector unsigned long long
  29 testul2_var(unsigned long long x, vector unsigned long long v, signed int i)
  30 {
  31    return vec_insert(x, v, i);
  32 }
  33
  34 vector bool long long
  35 testbl_cst(unsigned long long x, vector bool long long v)
  36 {
  37    return vec_insert(x, v, 12);
  38 }
  39
  40 vector signed long long
  41 testsl_cst(signed long long x, vector signed long long v)
  42 {
  43    return vec_insert(x, v, 12);
  44 }
  45
  46 vector unsigned long long
  47 testul1_cst(signed long long x, vector unsigned long long v)
  48 {
  49    return vec_insert(x, v, 12);
  50 }
  51
  52 vector unsigned long long
  53 testul2_cst(unsigned long long x, vector unsigned long long v)
  54 {
  55    return vec_insert(x, v, 12);
  56 }
  57
  58 /* Number of xxpermdi insns varies between power targets.  ensure at least one. */
  59 /* { dg-final { scan-assembler {\mxxpermdi\M} } } */
  60
  61 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 4 } } */
  62
  63 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 0 } } */
  64 /* { dg-final { scan-assembler-times {\mstdx\M} 0 { target lp64 } } } */
  65 /* { dg-final { scan-assembler-times {\mstw\M} 8 { target ilp32 } } } */
  66
  67 /* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 } } */
  68