Remove path name from test case
[binutils-gdb.git] / gdb / h8300-tdep.c
1 /* Target-machine dependent code for Renesas H8/300, for GDB.
2
3 Copyright (C) 1988-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 /*
21 Contributed by Steve Chamberlain
22 sac@cygnus.com
23 */
24
25 #include "defs.h"
26 #include "value.h"
27 #include "arch-utils.h"
28 #include "regcache.h"
29 #include "gdbcore.h"
30 #include "objfiles.h"
31 #include "dis-asm.h"
32 #include "dwarf2/frame.h"
33 #include "frame-base.h"
34 #include "frame-unwind.h"
35
36 enum gdb_regnum
37 {
38 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
39 E_RET0_REGNUM = E_R0_REGNUM,
40 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
41 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
42 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
43 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
44 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
45 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
46 E_SP_REGNUM,
47 E_CCR_REGNUM,
48 E_PC_REGNUM,
49 E_CYCLES_REGNUM,
50 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
51 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
52 E_INSTS_REGNUM,
53 E_MACH_REGNUM,
54 E_MACL_REGNUM,
55 E_SBR_REGNUM,
56 E_VBR_REGNUM
57 };
58
59 #define H8300_MAX_NUM_REGS 18
60
61 #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
62 #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
63
64 struct h8300_frame_cache
65 {
66 /* Base address. */
67 CORE_ADDR base;
68 CORE_ADDR sp_offset;
69 CORE_ADDR pc;
70
71 /* Flag showing that a frame has been created in the prologue code. */
72 int uses_fp;
73
74 /* Saved registers. */
75 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
76 CORE_ADDR saved_sp;
77 };
78
79 enum
80 {
81 h8300_reg_size = 2,
82 h8300h_reg_size = 4,
83 h8300_max_reg_size = 4,
84 };
85
86 static int is_h8300hmode (struct gdbarch *gdbarch);
87 static int is_h8300smode (struct gdbarch *gdbarch);
88 static int is_h8300sxmode (struct gdbarch *gdbarch);
89 static int is_h8300_normal_mode (struct gdbarch *gdbarch);
90
91 #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
92 && !is_h8300_normal_mode (gdbarch)) \
93 ? h8300h_reg_size : h8300_reg_size)
94
95 /* Normal frames. */
96
97 /* Allocate and initialize a frame cache. */
98
99 static void
100 h8300_init_frame_cache (struct gdbarch *gdbarch,
101 struct h8300_frame_cache *cache)
102 {
103 int i;
104
105 /* Base address. */
106 cache->base = 0;
107 cache->sp_offset = 0;
108 cache->pc = 0;
109
110 /* Frameless until proven otherwise. */
111 cache->uses_fp = 0;
112
113 /* Saved registers. We initialize these to -1 since zero is a valid
114 offset (that's where %fp is supposed to be stored). */
115 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
116 cache->saved_regs[i] = -1;
117 }
118
119 #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
120 #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
121 #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
122 #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
123 #define IS_MOVB_EXT(x) ((x) == 0x7860)
124 #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
125 #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
126 #define IS_MOVW_EXT(x) ((x) == 0x78e0)
127 #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
128 /* Same instructions as mov.w, just prefixed with 0x0100. */
129 #define IS_MOVL_PRE(x) ((x) == 0x0100)
130 #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
131 #define IS_MOVL_EXT(x) ((x) == 0x78e0)
132 #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
133
134 #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
135 #define IS_PUSH_FP(x) ((x) == 0x01006df6)
136 #define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
137 #define IS_SUB2_SP(x) ((x) == 0x1b87)
138 #define IS_SUB4_SP(x) ((x) == 0x1b97)
139 #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
140 #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
141 #define IS_SUBL4_SP(x) ((x) == 0x1acf)
142 #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
143 #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
144 #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
145 #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
146
147 /* If the instruction at PC is an argument register spill, return its
148 length. Otherwise, return zero.
149
150 An argument register spill is an instruction that moves an argument
151 from the register in which it was passed to the stack slot in which
152 it really lives. It is a byte, word, or longword move from an
153 argument register to a negative offset from the frame pointer.
154
155 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
156 is used, it could be a byte, word or long move to registers r3-r5. */
157
158 static int
159 h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc)
160 {
161 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
162 int w = read_memory_unsigned_integer (pc, 2, byte_order);
163
164 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
165 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
166 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
167 return 2;
168
169 if (IS_MOVB_Rn16_SP (w)
170 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
171 {
172 /* ... and d:16 is negative. */
173 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
174 return 4;
175 }
176 else if (IS_MOVB_EXT (w))
177 {
178 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2,
179 2, byte_order)))
180 {
181 ULONGEST disp = read_memory_unsigned_integer (pc + 4, 4, byte_order);
182
183 /* ... and d:24 is negative. */
184 if ((disp & 0x00800000) != 0)
185 return 8;
186 }
187 }
188 else if (IS_MOVW_Rn16_SP (w)
189 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
190 {
191 /* ... and d:16 is negative. */
192 if (read_memory_integer (pc + 2, 2, byte_order) < 0)
193 return 4;
194 }
195 else if (IS_MOVW_EXT (w))
196 {
197 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2,
198 2, byte_order)))
199 {
200 ULONGEST disp = read_memory_unsigned_integer (pc + 4, 4, byte_order);
201
202 /* ... and d:24 is negative. */
203 if ((disp & 0x00800000) != 0)
204 return 8;
205 }
206 }
207 else if (IS_MOVL_PRE (w))
208 {
209 int w2 = read_memory_integer (pc + 2, 2, byte_order);
210
211 if (IS_MOVL_Rn16_SP (w2)
212 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
213 {
214 /* ... and d:16 is negative. */
215 if (read_memory_integer (pc + 4, 2, byte_order) < 0)
216 return 6;
217 }
218 else if (IS_MOVL_EXT (w2))
219 {
220 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order)))
221 {
222 ULONGEST disp = read_memory_unsigned_integer (pc + 6, 4,
223 byte_order);
224
225 /* ... and d:24 is negative. */
226 if ((disp & 0x00800000) != 0)
227 return 10;
228 }
229 }
230 }
231
232 return 0;
233 }
234
235 /* Do a full analysis of the prologue at PC and update CACHE
236 accordingly. Bail out early if CURRENT_PC is reached. Return the
237 address where the analysis stopped.
238
239 We handle all cases that can be generated by gcc.
240
241 For allocating a stack frame:
242
243 mov.w r6,@-sp
244 mov.w sp,r6
245 mov.w #-n,rN
246 add.w rN,sp
247
248 mov.w r6,@-sp
249 mov.w sp,r6
250 subs #2,sp
251 (repeat)
252
253 mov.l er6,@-sp
254 mov.l sp,er6
255 add.l #-n,sp
256
257 mov.w r6,@-sp
258 mov.w sp,r6
259 subs #4,sp
260 (repeat)
261
262 For saving registers:
263
264 mov.w rN,@-sp
265 mov.l erN,@-sp
266 stm.l reglist,@-sp
267
268 */
269
270 static CORE_ADDR
271 h8300_analyze_prologue (struct gdbarch *gdbarch,
272 CORE_ADDR pc, CORE_ADDR current_pc,
273 struct h8300_frame_cache *cache)
274 {
275 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
276 unsigned int op;
277 int regno, i, spill_size;
278
279 cache->sp_offset = 0;
280
281 if (pc >= current_pc)
282 return current_pc;
283
284 op = read_memory_unsigned_integer (pc, 4, byte_order);
285
286 if (IS_PUSHFP_MOVESPFP (op))
287 {
288 cache->saved_regs[E_FP_REGNUM] = 0;
289 cache->uses_fp = 1;
290 pc += 4;
291 }
292 else if (IS_PUSH_FP (op))
293 {
294 cache->saved_regs[E_FP_REGNUM] = 0;
295 pc += 4;
296 if (pc >= current_pc)
297 return current_pc;
298 op = read_memory_unsigned_integer (pc, 2, byte_order);
299 if (IS_MOV_SP_FP (op))
300 {
301 cache->uses_fp = 1;
302 pc += 2;
303 }
304 }
305
306 while (pc < current_pc)
307 {
308 op = read_memory_unsigned_integer (pc, 2, byte_order);
309 if (IS_SUB2_SP (op))
310 {
311 cache->sp_offset += 2;
312 pc += 2;
313 }
314 else if (IS_SUB4_SP (op))
315 {
316 cache->sp_offset += 4;
317 pc += 2;
318 }
319 else if (IS_ADD_IMM_SP (op))
320 {
321 cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order);
322 pc += 4;
323 }
324 else if (IS_SUB_IMM_SP (op))
325 {
326 cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order);
327 pc += 4;
328 }
329 else if (IS_SUBL4_SP (op))
330 {
331 cache->sp_offset += 4;
332 pc += 2;
333 }
334 else if (IS_MOV_IMM_Rn (op))
335 {
336 int offset = read_memory_integer (pc + 2, 2, byte_order);
337 regno = op & 0x000f;
338 op = read_memory_unsigned_integer (pc + 4, 2, byte_order);
339 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
340 {
341 cache->sp_offset -= offset;
342 pc += 6;
343 }
344 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
345 {
346 cache->sp_offset += offset;
347 pc += 6;
348 }
349 else
350 break;
351 }
352 else if (IS_PUSH (op))
353 {
354 regno = op & 0x000f;
355 cache->sp_offset += 2;
356 cache->saved_regs[regno] = cache->sp_offset;
357 pc += 2;
358 }
359 else if (op == 0x0100)
360 {
361 op = read_memory_unsigned_integer (pc + 2, 2, byte_order);
362 if (IS_PUSH (op))
363 {
364 regno = op & 0x000f;
365 cache->sp_offset += 4;
366 cache->saved_regs[regno] = cache->sp_offset;
367 pc += 4;
368 }
369 else
370 break;
371 }
372 else if ((op & 0xffcf) == 0x0100)
373 {
374 int op1;
375 op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order);
376 if (IS_PUSH (op1))
377 {
378 /* Since the prefix is 0x01x0, this is not a simple pushm but a
379 stm.l reglist,@-sp */
380 i = ((op & 0x0030) >> 4) + 1;
381 regno = op1 & 0x000f;
382 for (; i > 0; regno++, --i)
383 {
384 cache->sp_offset += 4;
385 cache->saved_regs[regno] = cache->sp_offset;
386 }
387 pc += 4;
388 }
389 else
390 break;
391 }
392 else
393 break;
394 }
395
396 /* Check for spilling an argument register to the stack frame.
397 This could also be an initializing store from non-prologue code,
398 but I don't think there's any harm in skipping that. */
399 while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0
400 && pc + spill_size <= current_pc)
401 pc += spill_size;
402
403 return pc;
404 }
405
406 static struct h8300_frame_cache *
407 h8300_frame_cache (frame_info_ptr this_frame, void **this_cache)
408 {
409 struct gdbarch *gdbarch = get_frame_arch (this_frame);
410 struct h8300_frame_cache *cache;
411 int i;
412 CORE_ADDR current_pc;
413
414 if (*this_cache)
415 return (struct h8300_frame_cache *) *this_cache;
416
417 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
418 h8300_init_frame_cache (gdbarch, cache);
419 *this_cache = cache;
420
421 /* In principle, for normal frames, %fp holds the frame pointer,
422 which holds the base address for the current stack frame.
423 However, for functions that don't need it, the frame pointer is
424 optional. For these "frameless" functions the frame pointer is
425 actually the frame pointer of the calling frame. */
426
427 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM);
428 if (cache->base == 0)
429 return cache;
430
431 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
432
433 cache->pc = get_frame_func (this_frame);
434 current_pc = get_frame_pc (this_frame);
435 if (cache->pc != 0)
436 h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache);
437
438 if (!cache->uses_fp)
439 {
440 /* We didn't find a valid frame, which means that CACHE->base
441 currently holds the frame pointer for our calling frame. If
442 we're at the start of a function, or somewhere half-way its
443 prologue, the function's frame probably hasn't been fully
444 setup yet. Try to reconstruct the base address for the stack
445 frame by looking at the stack pointer. For truly "frameless"
446 functions this might work too. */
447
448 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM)
449 + cache->sp_offset;
450 cache->saved_sp = cache->base + BINWORD (gdbarch);
451 cache->saved_regs[E_PC_REGNUM] = 0;
452 }
453 else
454 {
455 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
456 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
457 }
458
459 /* Adjust all the saved registers such that they contain addresses
460 instead of offsets. */
461 for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
462 if (cache->saved_regs[i] != -1)
463 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
464
465 return cache;
466 }
467
468 static void
469 h8300_frame_this_id (frame_info_ptr this_frame, void **this_cache,
470 struct frame_id *this_id)
471 {
472 struct h8300_frame_cache *cache =
473 h8300_frame_cache (this_frame, this_cache);
474
475 /* This marks the outermost frame. */
476 if (cache->base == 0)
477 return;
478
479 *this_id = frame_id_build (cache->saved_sp, cache->pc);
480 }
481
482 static struct value *
483 h8300_frame_prev_register (frame_info_ptr this_frame, void **this_cache,
484 int regnum)
485 {
486 struct gdbarch *gdbarch = get_frame_arch (this_frame);
487 struct h8300_frame_cache *cache =
488 h8300_frame_cache (this_frame, this_cache);
489
490 gdb_assert (regnum >= 0);
491
492 if (regnum == E_SP_REGNUM && cache->saved_sp)
493 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
494
495 if (regnum < gdbarch_num_regs (gdbarch)
496 && cache->saved_regs[regnum] != -1)
497 return frame_unwind_got_memory (this_frame, regnum,
498 cache->saved_regs[regnum]);
499
500 return frame_unwind_got_register (this_frame, regnum, regnum);
501 }
502
503 static const struct frame_unwind h8300_frame_unwind = {
504 "h8300 prologue",
505 NORMAL_FRAME,
506 default_frame_unwind_stop_reason,
507 h8300_frame_this_id,
508 h8300_frame_prev_register,
509 NULL,
510 default_frame_sniffer
511 };
512
513 static CORE_ADDR
514 h8300_frame_base_address (frame_info_ptr this_frame, void **this_cache)
515 {
516 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache);
517 return cache->base;
518 }
519
520 static const struct frame_base h8300_frame_base = {
521 &h8300_frame_unwind,
522 h8300_frame_base_address,
523 h8300_frame_base_address,
524 h8300_frame_base_address
525 };
526
527 static CORE_ADDR
528 h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
529 {
530 CORE_ADDR func_addr = 0 , func_end = 0;
531
532 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
533 {
534 struct symtab_and_line sal;
535 struct h8300_frame_cache cache;
536
537 /* Found a function. */
538 sal = find_pc_line (func_addr, 0);
539 if (sal.end && sal.end < func_end)
540 /* Found a line number, use it as end of prologue. */
541 return sal.end;
542
543 /* No useable line symbol. Use prologue parsing method. */
544 h8300_init_frame_cache (gdbarch, &cache);
545 return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache);
546 }
547
548 /* No function symbol -- just return the PC. */
549 return (CORE_ADDR) pc;
550 }
551
552 /* Function: push_dummy_call
553 Setup the function arguments for calling a function in the inferior.
554 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
555 on the H8/300H.
556
557 There are actually two ABI's here: -mquickcall (the default) and
558 -mno-quickcall. With -mno-quickcall, all arguments are passed on
559 the stack after the return address, word-aligned. With
560 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
561 GCC doesn't indicate in the object file which ABI was used to
562 compile it, GDB only supports the default --- -mquickcall.
563
564 Here are the rules for -mquickcall, in detail:
565
566 Each argument, whether scalar or aggregate, is padded to occupy a
567 whole number of words. Arguments smaller than a word are padded at
568 the most significant end; those larger than a word are padded at
569 the least significant end.
570
571 The initial arguments are passed in r0 -- r2. Earlier arguments go in
572 lower-numbered registers. Multi-word arguments are passed in
573 consecutive registers, with the most significant end in the
574 lower-numbered register.
575
576 If an argument doesn't fit entirely in the remaining registers, it
577 is passed entirely on the stack. Stack arguments begin just after
578 the return address. Once an argument has overflowed onto the stack
579 this way, all subsequent arguments are passed on the stack.
580
581 The above rule has odd consequences. For example, on the h8/300s,
582 if a function takes two longs and an int as arguments:
583 - the first long will be passed in r0/r1,
584 - the second long will be passed entirely on the stack, since it
585 doesn't fit in r2,
586 - and the int will be passed on the stack, even though it could fit
587 in r2.
588
589 A weird exception: if an argument is larger than a word, but not a
590 whole number of words in length (before padding), it is passed on
591 the stack following the rules for stack arguments above, even if
592 there are sufficient registers available to hold it. Stranger
593 still, the argument registers are still `used up' --- even though
594 there's nothing in them.
595
596 So, for example, on the h8/300s, if a function expects a three-byte
597 structure and an int, the structure will go on the stack, and the
598 int will go in r2, not r0.
599
600 If the function returns an aggregate type (struct, union, or class)
601 by value, the caller must allocate space to hold the return value,
602 and pass the callee a pointer to this space as an invisible first
603 argument, in R0.
604
605 For varargs functions, the last fixed argument and all the variable
606 arguments are always passed on the stack. This means that calls to
607 varargs functions don't work properly unless there is a prototype
608 in scope.
609
610 Basically, this ABI is not good, for the following reasons:
611 - You can't call vararg functions properly unless a prototype is in scope.
612 - Structure passing is inconsistent, to no purpose I can see.
613 - It often wastes argument registers, of which there are only three
614 to begin with. */
615
616 static CORE_ADDR
617 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
618 struct regcache *regcache, CORE_ADDR bp_addr,
619 int nargs, struct value **args, CORE_ADDR sp,
620 function_call_return_method return_method,
621 CORE_ADDR struct_addr)
622 {
623 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
624 int stack_alloc = 0, stack_offset = 0;
625 int wordsize = BINWORD (gdbarch);
626 int reg = E_ARG0_REGNUM;
627 int argument;
628
629 /* First, make sure the stack is properly aligned. */
630 sp = align_down (sp, wordsize);
631
632 /* Now make sure there's space on the stack for the arguments. We
633 may over-allocate a little here, but that won't hurt anything. */
634 for (argument = 0; argument < nargs; argument++)
635 stack_alloc += align_up (args[argument]->type ()->length (), wordsize);
636 sp -= stack_alloc;
637
638 /* Now load as many arguments as possible into registers, and push
639 the rest onto the stack.
640 If we're returning a structure by value, then we must pass a
641 pointer to the buffer for the return value as an invisible first
642 argument. */
643 if (return_method == return_method_struct)
644 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
645
646 for (argument = 0; argument < nargs; argument++)
647 {
648 struct type *type = args[argument]->type ();
649 int len = type->length ();
650 char *contents = (char *) args[argument]->contents ().data ();
651
652 /* Pad the argument appropriately. */
653 int padded_len = align_up (len, wordsize);
654 /* Use std::vector here to get zero initialization. */
655 std::vector<gdb_byte> padded (padded_len);
656
657 memcpy ((len < wordsize ? padded.data () + padded_len - len
658 : padded.data ()),
659 contents, len);
660
661 /* Could the argument fit in the remaining registers? */
662 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
663 {
664 /* Are we going to pass it on the stack anyway, for no good
665 reason? */
666 if (len > wordsize && len % wordsize)
667 {
668 /* I feel so unclean. */
669 write_memory (sp + stack_offset, padded.data (), padded_len);
670 stack_offset += padded_len;
671
672 /* That's right --- even though we passed the argument
673 on the stack, we consume the registers anyway! Love
674 me, love my dog. */
675 reg += padded_len / wordsize;
676 }
677 else
678 {
679 /* Heavens to Betsy --- it's really going in registers!
680 Note that on the h8/300s, there are gaps between the
681 registers in the register file. */
682 int offset;
683
684 for (offset = 0; offset < padded_len; offset += wordsize)
685 {
686 ULONGEST word
687 = extract_unsigned_integer (&padded[offset],
688 wordsize, byte_order);
689 regcache_cooked_write_unsigned (regcache, reg++, word);
690 }
691 }
692 }
693 else
694 {
695 /* It doesn't fit in registers! Onto the stack it goes. */
696 write_memory (sp + stack_offset, padded.data (), padded_len);
697 stack_offset += padded_len;
698
699 /* Once one argument has spilled onto the stack, all
700 subsequent arguments go on the stack. */
701 reg = E_ARGLAST_REGNUM + 1;
702 }
703 }
704
705 /* Store return address. */
706 sp -= wordsize;
707 write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr);
708
709 /* Update stack pointer. */
710 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
711
712 /* Return the new stack pointer minus the return address slot since
713 that's what DWARF2/GCC uses as the frame's CFA. */
714 return sp + wordsize;
715 }
716
717 /* Function: extract_return_value
718 Figure out where in REGBUF the called function has left its return value.
719 Copy that into VALBUF. Be sure to account for CPU type. */
720
721 static void
722 h8300_extract_return_value (struct type *type, struct regcache *regcache,
723 gdb_byte *valbuf)
724 {
725 struct gdbarch *gdbarch = regcache->arch ();
726 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
727 int len = type->length ();
728 ULONGEST c, addr;
729
730 switch (len)
731 {
732 case 1:
733 case 2:
734 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
735 store_unsigned_integer (valbuf, len, byte_order, c);
736 break;
737 case 4: /* Needs two registers on plain H8/300 */
738 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
739 store_unsigned_integer (valbuf, 2, byte_order, c);
740 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
741 store_unsigned_integer (valbuf + 2, 2, byte_order, c);
742 break;
743 case 8: /* long long is now 8 bytes. */
744 if (type->code () == TYPE_CODE_INT)
745 {
746 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
747 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order);
748 store_unsigned_integer (valbuf, len, byte_order, c);
749 }
750 else
751 {
752 error (_("I don't know how this 8 byte value is returned."));
753 }
754 break;
755 }
756 }
757
758 static void
759 h8300h_extract_return_value (struct type *type, struct regcache *regcache,
760 gdb_byte *valbuf)
761 {
762 struct gdbarch *gdbarch = regcache->arch ();
763 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
764 ULONGEST c;
765
766 switch (type->length ())
767 {
768 case 1:
769 case 2:
770 case 4:
771 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
772 store_unsigned_integer (valbuf, type->length (), byte_order, c);
773 break;
774 case 8: /* long long is now 8 bytes. */
775 if (type->code () == TYPE_CODE_INT)
776 {
777 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
778 store_unsigned_integer (valbuf, 4, byte_order, c);
779 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
780 store_unsigned_integer (valbuf + 4, 4, byte_order, c);
781 }
782 else
783 {
784 error (_("I don't know how this 8 byte value is returned."));
785 }
786 break;
787 }
788 }
789
790 static int
791 h8300_use_struct_convention (struct type *value_type)
792 {
793 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
794 stack. */
795
796 if (value_type->code () == TYPE_CODE_STRUCT
797 || value_type->code () == TYPE_CODE_UNION)
798 return 1;
799 return !(value_type->length () == 1
800 || value_type->length () == 2
801 || value_type->length () == 4);
802 }
803
804 static int
805 h8300h_use_struct_convention (struct type *value_type)
806 {
807 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
808 returned in R0/R1, everything else on the stack. */
809 if (value_type->code () == TYPE_CODE_STRUCT
810 || value_type->code () == TYPE_CODE_UNION)
811 return 1;
812 return !(value_type->length () == 1
813 || value_type->length () == 2
814 || value_type->length () == 4
815 || (value_type->length () == 8
816 && value_type->code () == TYPE_CODE_INT));
817 }
818
819 /* Function: store_return_value
820 Place the appropriate value in the appropriate registers.
821 Primarily used by the RETURN command. */
822
823 static void
824 h8300_store_return_value (struct type *type, struct regcache *regcache,
825 const gdb_byte *valbuf)
826 {
827 struct gdbarch *gdbarch = regcache->arch ();
828 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
829 ULONGEST val;
830
831 switch (type->length ())
832 {
833 case 1:
834 case 2: /* short... */
835 val = extract_unsigned_integer (valbuf, type->length (), byte_order);
836 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
837 break;
838 case 4: /* long, float */
839 val = extract_unsigned_integer (valbuf, type->length (), byte_order);
840 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
841 (val >> 16) & 0xffff);
842 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
843 break;
844 case 8: /* long long, double and long double
845 are all defined as 4 byte types so
846 far so this shouldn't happen. */
847 error (_("I don't know how to return an 8 byte value."));
848 break;
849 }
850 }
851
852 static void
853 h8300h_store_return_value (struct type *type, struct regcache *regcache,
854 const gdb_byte *valbuf)
855 {
856 struct gdbarch *gdbarch = regcache->arch ();
857 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
858 ULONGEST val;
859
860 switch (type->length ())
861 {
862 case 1:
863 case 2:
864 case 4: /* long, float */
865 val = extract_unsigned_integer (valbuf, type->length (), byte_order);
866 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
867 break;
868 case 8:
869 val = extract_unsigned_integer (valbuf, type->length (), byte_order);
870 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
871 (val >> 32) & 0xffffffff);
872 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
873 val & 0xffffffff);
874 break;
875 }
876 }
877
878 static enum return_value_convention
879 h8300_return_value (struct gdbarch *gdbarch, struct value *function,
880 struct type *type, struct regcache *regcache,
881 gdb_byte *readbuf, const gdb_byte *writebuf)
882 {
883 if (h8300_use_struct_convention (type))
884 return RETURN_VALUE_STRUCT_CONVENTION;
885 if (writebuf)
886 h8300_store_return_value (type, regcache, writebuf);
887 else if (readbuf)
888 h8300_extract_return_value (type, regcache, readbuf);
889 return RETURN_VALUE_REGISTER_CONVENTION;
890 }
891
892 static enum return_value_convention
893 h8300h_return_value (struct gdbarch *gdbarch, struct value *function,
894 struct type *type, struct regcache *regcache,
895 gdb_byte *readbuf, const gdb_byte *writebuf)
896 {
897 if (h8300h_use_struct_convention (type))
898 {
899 if (readbuf)
900 {
901 ULONGEST addr;
902
903 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
904 read_memory (addr, readbuf, type->length ());
905 }
906
907 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
908 }
909 if (writebuf)
910 h8300h_store_return_value (type, regcache, writebuf);
911 else if (readbuf)
912 h8300h_extract_return_value (type, regcache, readbuf);
913 return RETURN_VALUE_REGISTER_CONVENTION;
914 }
915
916 /* Implementation of 'register_sim_regno' gdbarch method. */
917
918 static int
919 h8300_register_sim_regno (struct gdbarch *gdbarch, int regnum)
920 {
921 /* Only makes sense to supply raw registers. */
922 gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
923
924 /* We hide the raw ccr from the user by making it nameless. Because
925 the default register_sim_regno hook returns
926 LEGACY_SIM_REGNO_IGNORE for unnamed registers, we need to
927 override it. The sim register numbering is compatible with
928 gdb's. */
929 return regnum;
930 }
931
932 static const char *
933 h8300_register_name_common (const char *regnames[], int numregs,
934 struct gdbarch *gdbarch, int regno)
935 {
936 gdb_assert (numregs == gdbarch_num_cooked_regs (gdbarch));
937 return regnames[regno];
938 }
939
940 static const char *
941 h8300_register_name (struct gdbarch *gdbarch, int regno)
942 {
943 /* The register names change depending on which h8300 processor
944 type is selected. */
945 static const char *register_names[] = {
946 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
947 "sp", "", "pc", "cycles", "tick", "inst",
948 "ccr", /* pseudo register */
949 };
950 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
951 gdbarch, regno);
952 }
953
954 static const char *
955 h8300h_register_name (struct gdbarch *gdbarch, int regno)
956 {
957 static const char *register_names[] = {
958 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
959 "sp", "", "pc", "cycles", "tick", "inst",
960 "ccr", /* pseudo register */
961 };
962 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
963 gdbarch, regno);
964 }
965
966 static const char *
967 h8300s_register_name (struct gdbarch *gdbarch, int regno)
968 {
969 static const char *register_names[] = {
970 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
971 "sp", "", "pc", "cycles", "", "tick", "inst",
972 "mach", "macl",
973 "ccr", "exr" /* pseudo registers */
974 };
975 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
976 gdbarch, regno);
977 }
978
979 static const char *
980 h8300sx_register_name (struct gdbarch *gdbarch, int regno)
981 {
982 static const char *register_names[] = {
983 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
984 "sp", "", "pc", "cycles", "", "tick", "inst",
985 "mach", "macl", "sbr", "vbr",
986 "ccr", "exr" /* pseudo registers */
987 };
988 return h8300_register_name_common(register_names, ARRAY_SIZE(register_names),
989 gdbarch, regno);
990 }
991
992 static void
993 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
994 frame_info_ptr frame, int regno)
995 {
996 LONGEST rval;
997 const char *name = gdbarch_register_name (gdbarch, regno);
998
999 if (*name == '\0')
1000 return;
1001
1002 rval = get_frame_register_signed (frame, regno);
1003
1004 gdb_printf (file, "%-14s ", name);
1005 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
1006 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
1007 {
1008 gdb_printf (file, "0x%02x ", (unsigned char) rval);
1009 print_longest (file, 'u', 1, rval);
1010 }
1011 else
1012 {
1013 gdb_printf (file, "0x%s ", phex ((ULONGEST) rval,
1014 BINWORD (gdbarch)));
1015 print_longest (file, 'd', 1, rval);
1016 }
1017 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1018 {
1019 /* CCR register */
1020 int C, Z, N, V;
1021 unsigned char l = rval & 0xff;
1022 gdb_printf (file, "\t");
1023 gdb_printf (file, "I-%d ", (l & 0x80) != 0);
1024 gdb_printf (file, "UI-%d ", (l & 0x40) != 0);
1025 gdb_printf (file, "H-%d ", (l & 0x20) != 0);
1026 gdb_printf (file, "U-%d ", (l & 0x10) != 0);
1027 N = (l & 0x8) != 0;
1028 Z = (l & 0x4) != 0;
1029 V = (l & 0x2) != 0;
1030 C = (l & 0x1) != 0;
1031 gdb_printf (file, "N-%d ", N);
1032 gdb_printf (file, "Z-%d ", Z);
1033 gdb_printf (file, "V-%d ", V);
1034 gdb_printf (file, "C-%d ", C);
1035 if ((C | Z) == 0)
1036 gdb_printf (file, "u> ");
1037 if ((C | Z) == 1)
1038 gdb_printf (file, "u<= ");
1039 if (C == 0)
1040 gdb_printf (file, "u>= ");
1041 if (C == 1)
1042 gdb_printf (file, "u< ");
1043 if (Z == 0)
1044 gdb_printf (file, "!= ");
1045 if (Z == 1)
1046 gdb_printf (file, "== ");
1047 if ((N ^ V) == 0)
1048 gdb_printf (file, ">= ");
1049 if ((N ^ V) == 1)
1050 gdb_printf (file, "< ");
1051 if ((Z | (N ^ V)) == 0)
1052 gdb_printf (file, "> ");
1053 if ((Z | (N ^ V)) == 1)
1054 gdb_printf (file, "<= ");
1055 }
1056 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
1057 {
1058 /* EXR register */
1059 unsigned char l = rval & 0xff;
1060 gdb_printf (file, "\t");
1061 gdb_printf (file, "T-%d - - - ", (l & 0x80) != 0);
1062 gdb_printf (file, "I2-%d ", (l & 4) != 0);
1063 gdb_printf (file, "I1-%d ", (l & 2) != 0);
1064 gdb_printf (file, "I0-%d", (l & 1) != 0);
1065 }
1066 gdb_printf (file, "\n");
1067 }
1068
1069 static void
1070 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1071 frame_info_ptr frame, int regno, int cpregs)
1072 {
1073 if (regno < 0)
1074 {
1075 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1076 h8300_print_register (gdbarch, file, frame, regno);
1077 h8300_print_register (gdbarch, file, frame,
1078 E_PSEUDO_CCR_REGNUM (gdbarch));
1079 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1080 if (is_h8300smode (gdbarch))
1081 {
1082 h8300_print_register (gdbarch, file, frame,
1083 E_PSEUDO_EXR_REGNUM (gdbarch));
1084 if (is_h8300sxmode (gdbarch))
1085 {
1086 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1087 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1088 }
1089 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1090 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1091 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1092 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1093 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1094 }
1095 else
1096 {
1097 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1098 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1099 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1100 }
1101 }
1102 else
1103 {
1104 if (regno == E_CCR_REGNUM)
1105 h8300_print_register (gdbarch, file, frame,
1106 E_PSEUDO_CCR_REGNUM (gdbarch));
1107 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
1108 && is_h8300smode (gdbarch))
1109 h8300_print_register (gdbarch, file, frame,
1110 E_PSEUDO_EXR_REGNUM (gdbarch));
1111 else
1112 h8300_print_register (gdbarch, file, frame, regno);
1113 }
1114 }
1115
1116 static struct type *
1117 h8300_register_type (struct gdbarch *gdbarch, int regno)
1118 {
1119 if (regno < 0 || regno >= gdbarch_num_cooked_regs (gdbarch))
1120 internal_error (_("h8300_register_type: illegal register number %d"),
1121 regno);
1122 else
1123 {
1124 switch (regno)
1125 {
1126 case E_PC_REGNUM:
1127 return builtin_type (gdbarch)->builtin_func_ptr;
1128 case E_SP_REGNUM:
1129 case E_FP_REGNUM:
1130 return builtin_type (gdbarch)->builtin_data_ptr;
1131 default:
1132 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1133 return builtin_type (gdbarch)->builtin_uint8;
1134 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1135 return builtin_type (gdbarch)->builtin_uint8;
1136 else if (is_h8300hmode (gdbarch))
1137 return builtin_type (gdbarch)->builtin_int32;
1138 else
1139 return builtin_type (gdbarch)->builtin_int16;
1140 }
1141 }
1142 }
1143
1144 /* Helpers for h8300_pseudo_register_read. We expose ccr/exr as
1145 pseudo-registers to users with smaller sizes than the corresponding
1146 raw registers. These helpers extend/narrow the values. */
1147
1148 static enum register_status
1149 pseudo_from_raw_register (struct gdbarch *gdbarch, readable_regcache *regcache,
1150 gdb_byte *buf, int pseudo_regno, int raw_regno)
1151 {
1152 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1153 enum register_status status;
1154 ULONGEST val;
1155
1156 status = regcache->raw_read (raw_regno, &val);
1157 if (status == REG_VALID)
1158 store_unsigned_integer (buf,
1159 register_size (gdbarch, pseudo_regno),
1160 byte_order, val);
1161 return status;
1162 }
1163
1164 /* See pseudo_from_raw_register. */
1165
1166 static void
1167 raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache,
1168 const gdb_byte *buf, int raw_regno, int pseudo_regno)
1169 {
1170 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1171 ULONGEST val;
1172
1173 val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno),
1174 byte_order);
1175 regcache_raw_write_unsigned (regcache, raw_regno, val);
1176 }
1177
1178 static enum register_status
1179 h8300_pseudo_register_read (struct gdbarch *gdbarch,
1180 readable_regcache *regcache, int regno,
1181 gdb_byte *buf)
1182 {
1183 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1184 {
1185 return pseudo_from_raw_register (gdbarch, regcache, buf,
1186 regno, E_CCR_REGNUM);
1187 }
1188 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1189 {
1190 return pseudo_from_raw_register (gdbarch, regcache, buf,
1191 regno, E_EXR_REGNUM);
1192 }
1193 else
1194 return regcache->raw_read (regno, buf);
1195 }
1196
1197 static void
1198 h8300_pseudo_register_write (struct gdbarch *gdbarch,
1199 struct regcache *regcache, int regno,
1200 const gdb_byte *buf)
1201 {
1202 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1203 raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno);
1204 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1205 raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno);
1206 else
1207 regcache->raw_write (regno, buf);
1208 }
1209
1210 static int
1211 h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1212 {
1213 if (regno == E_CCR_REGNUM)
1214 return E_PSEUDO_CCR_REGNUM (gdbarch);
1215 return regno;
1216 }
1217
1218 static int
1219 h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1220 {
1221 if (regno == E_CCR_REGNUM)
1222 return E_PSEUDO_CCR_REGNUM (gdbarch);
1223 if (regno == E_EXR_REGNUM)
1224 return E_PSEUDO_EXR_REGNUM (gdbarch);
1225 return regno;
1226 }
1227
1228 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1229 constexpr gdb_byte h8300_break_insn[] = { 0x01, 0x80 }; /* Sleep */
1230
1231 typedef BP_MANIPULATION (h8300_break_insn) h8300_breakpoint;
1232
1233 static struct gdbarch *
1234 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1235 {
1236 struct gdbarch *gdbarch;
1237
1238 arches = gdbarch_list_lookup_by_info (arches, &info);
1239 if (arches != NULL)
1240 return arches->gdbarch;
1241
1242 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1243 return NULL;
1244
1245 gdbarch = gdbarch_alloc (&info, 0);
1246
1247 set_gdbarch_register_sim_regno (gdbarch, h8300_register_sim_regno);
1248
1249 switch (info.bfd_arch_info->mach)
1250 {
1251 case bfd_mach_h8300:
1252 set_gdbarch_num_regs (gdbarch, 13);
1253 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1254 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1255 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1256 set_gdbarch_register_name (gdbarch, h8300_register_name);
1257 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1258 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1259 set_gdbarch_return_value (gdbarch, h8300_return_value);
1260 break;
1261 case bfd_mach_h8300h:
1262 case bfd_mach_h8300hn:
1263 set_gdbarch_num_regs (gdbarch, 13);
1264 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1265 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1266 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1267 set_gdbarch_register_name (gdbarch, h8300h_register_name);
1268 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1269 {
1270 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1271 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1272 }
1273 else
1274 {
1275 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1276 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1277 }
1278 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1279 break;
1280 case bfd_mach_h8300s:
1281 case bfd_mach_h8300sn:
1282 set_gdbarch_num_regs (gdbarch, 16);
1283 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1284 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1285 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1286 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1287 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1288 {
1289 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1290 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1291 }
1292 else
1293 {
1294 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1295 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1296 }
1297 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1298 break;
1299 case bfd_mach_h8300sx:
1300 case bfd_mach_h8300sxn:
1301 set_gdbarch_num_regs (gdbarch, 18);
1302 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1303 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1304 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1305 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1306 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1307 {
1308 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1309 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1310 }
1311 else
1312 {
1313 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1314 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1315 }
1316 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1317 break;
1318 }
1319
1320 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1321 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1322
1323 /*
1324 * Basic register fields and methods.
1325 */
1326
1327 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1328 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1329 set_gdbarch_register_type (gdbarch, h8300_register_type);
1330 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1331
1332 /*
1333 * Frame Info
1334 */
1335 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1336
1337 /* Frame unwinder. */
1338 frame_base_set_default (gdbarch, &h8300_frame_base);
1339
1340 /*
1341 * Miscellany
1342 */
1343 /* Stack grows up. */
1344 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1345
1346 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
1347 h8300_breakpoint::kind_from_pc);
1348 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
1349 h8300_breakpoint::bp_from_kind);
1350 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1351
1352 set_gdbarch_char_signed (gdbarch, 0);
1353 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1354 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1355 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1356
1357 set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1358 set_gdbarch_wchar_signed (gdbarch, 0);
1359
1360 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1361 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1362 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1363 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1364
1365 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1366
1367 /* Hook in the DWARF CFI frame unwinder. */
1368 dwarf2_append_unwinders (gdbarch);
1369 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind);
1370
1371 return gdbarch;
1372
1373 }
1374
1375 void _initialize_h8300_tdep ();
1376 void
1377 _initialize_h8300_tdep ()
1378 {
1379 gdbarch_register (bfd_arch_h8300, h8300_gdbarch_init);
1380 }
1381
1382 static int
1383 is_h8300hmode (struct gdbarch *gdbarch)
1384 {
1385 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1386 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1387 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1388 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1389 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1390 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1391 }
1392
1393 static int
1394 is_h8300smode (struct gdbarch *gdbarch)
1395 {
1396 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1397 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1398 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1399 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1400 }
1401
1402 static int
1403 is_h8300sxmode (struct gdbarch *gdbarch)
1404 {
1405 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1406 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1407 }
1408
1409 static int
1410 is_h8300_normal_mode (struct gdbarch *gdbarch)
1411 {
1412 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1413 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1414 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1415 }