begin working on linux verilator simulation
[microwatt.git] / helpers.vhdl
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
4
5 library work;
6
7 package helpers is
8 function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer;
9 function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer;
10
11 function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer;
12 function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer;
13
14 function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
15 function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector;
16 function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector;
17
18 function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
19
20 function ppc_signed_compare(a, b: signed(63 downto 0); so: std_ulogic) return std_ulogic_vector;
21 function ppc_unsigned_compare(a, b: unsigned(63 downto 0); so: std_ulogic) return std_ulogic_vector;
22
23 function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector;
24
25 function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector;
26
27 function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector;
28
29 function bit_reverse(a: std_ulogic_vector) return std_ulogic_vector;
30 function bit_number(a: std_ulogic_vector(63 downto 0)) return std_ulogic_vector;
31 function edgelocation(v: std_ulogic_vector; nbits: natural) return std_ulogic_vector;
32 function count_left_zeroes(val: std_ulogic_vector) return std_ulogic_vector;
33 function count_right_zeroes(val: std_ulogic_vector) return std_ulogic_vector;
34 end package helpers;
35
36 package body helpers is
37 function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer is
38 variable ret: integer;
39 begin
40 ret := 32;
41 for i in val'range loop
42 if val(i) = '1' then
43 ret := 31 - i;
44 exit;
45 end if;
46 end loop;
47
48 return ret;
49 end;
50
51 function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer is
52 variable ret: integer;
53 begin
54 ret := 32;
55 for i in val'reverse_range loop
56 if val(i) = '1' then
57 ret := i;
58 exit;
59 end if;
60 end loop;
61
62 return ret;
63 end;
64
65 function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer is
66 variable ret: integer;
67 begin
68 ret := 64;
69 for i in val'range loop
70 if val(i) = '1' then
71 ret := 63 - i;
72 exit;
73 end if;
74 end loop;
75
76 return ret;
77 end;
78
79 function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer is
80 variable ret: integer;
81 begin
82 ret := 64;
83 for i in val'reverse_range loop
84 if val(i) = '1' then
85 ret := i;
86 exit;
87 end if;
88 end loop;
89
90 return ret;
91 end;
92
93 function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
94 variable ret: unsigned(3 downto 0) := (others => '0');
95 begin
96 for i in val'range loop
97 ret := ret + ("000" & val(i));
98 end loop;
99
100 return std_ulogic_vector(resize(ret, val'length));
101 end;
102
103 function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector is
104 variable ret: unsigned(5 downto 0) := (others => '0');
105 begin
106 for i in val'range loop
107 ret := ret + ("00000" & val(i));
108 end loop;
109
110 return std_ulogic_vector(resize(ret, val'length));
111 end;
112
113 function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector is
114 variable ret: unsigned(6 downto 0) := (others => '0');
115 begin
116 for i in val'range loop
117 ret := ret + ("000000" & val(i));
118 end loop;
119
120 return std_ulogic_vector(resize(ret, val'length));
121 end;
122
123 function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
124 variable ret: std_ulogic_vector(7 downto 0);
125 begin
126 if a = b then
127 ret := x"ff";
128 else
129 ret := x"00";
130 end if;
131
132 return ret;
133 end;
134
135 function ppc_signed_compare(a, b: signed(63 downto 0); so: std_ulogic) return std_ulogic_vector is
136 variable ret: std_ulogic_vector(2 downto 0);
137 begin
138 if a < b then
139 ret := "100";
140 elsif a > b then
141 ret := "010";
142 else
143 ret := "001";
144 end if;
145
146 return ret & so;
147 end;
148
149 function ppc_unsigned_compare(a, b: unsigned(63 downto 0); so: std_ulogic) return std_ulogic_vector is
150 variable ret: std_ulogic_vector(2 downto 0);
151 begin
152 if a < b then
153 ret := "100";
154 elsif a > b then
155 ret := "010";
156 else
157 ret := "001";
158 end if;
159
160 return ret & so;
161 end;
162
163 function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector is
164 begin
165 if to_integer(unsigned(reg)) = 0 then
166 return x"0000000000000000";
167 else
168 return ra;
169 end if;
170 end;
171
172 function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector is
173 variable ret : std_ulogic_vector(63 downto 0) := (others => '0');
174 begin
175 -- Vivado doesn't support non constant vector slices, so we have to code
176 -- each of these.
177 case_0: case size is
178 when 2 =>
179 for_2 : for k in 0 to 1 loop
180 ret(((8*k)+7) downto (8*k)) := val((8*(1-k)+7) downto (8*(1-k)));
181 end loop;
182 when 4 =>
183 for_4 : for k in 0 to 3 loop
184 ret(((8*k)+7) downto (8*k)) := val((8*(3-k)+7) downto (8*(3-k)));
185 end loop;
186 when 8 =>
187 for_8 : for k in 0 to 7 loop
188 ret(((8*k)+7) downto (8*k)) := val((8*(7-k)+7) downto (8*(7-k)));
189 end loop;
190 when others =>
191 report "bad byte reverse length " & integer'image(size) severity failure;
192 end case;
193
194 return ret;
195 end;
196
197 function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector is
198 variable ret : signed(63 downto 0) := (others => '0');
199 variable upper : integer := 0;
200 begin
201 case_0: case size is
202 when 2 =>
203 ret := resize(signed(val(15 downto 0)), 64);
204 when 4 =>
205 ret := resize(signed(val(31 downto 0)), 64);
206 when 8 =>
207 ret := resize(signed(val(63 downto 0)), 64);
208 when others =>
209 report "bad byte reverse length " & integer'image(size) severity failure;
210 end case;
211
212 return std_ulogic_vector(ret);
213
214 end;
215
216 -- Reverse the order of bits in a word
217 function bit_reverse(a: std_ulogic_vector) return std_ulogic_vector is
218 variable ret: std_ulogic_vector(a'left downto a'right);
219 begin
220 for i in a'right to a'left loop
221 ret(a'left + a'right - i) := a(i);
222 end loop;
223 return ret;
224 end;
225
226 -- If there is only one bit set in a doubleword, return its bit number
227 -- (counting from the right). Each bit of the result is obtained by
228 -- ORing together 32 bits of the input:
229 -- bit 0 = a[1] or a[3] or a[5] or ...
230 -- bit 1 = a[2] or a[3] or a[6] or a[7] or ...
231 -- bit 2 = a[4..7] or a[12..15] or ...
232 -- bit 5 = a[32..63] ORed together
233 function bit_number(a: std_ulogic_vector(63 downto 0)) return std_ulogic_vector is
234 variable ret: std_ulogic_vector(5 downto 0);
235 variable stride: natural;
236 variable bit: std_ulogic;
237 variable k: natural;
238 begin
239 stride := 2;
240 for i in 0 to 5 loop
241 bit := '0';
242 for j in 0 to (64 / stride) - 1 loop
243 k := j * stride;
244 bit := bit or (or a(k + stride - 1 downto k + (stride / 2)));
245 end loop;
246 ret(i) := bit;
247 stride := stride * 2;
248 end loop;
249 return ret;
250 end;
251
252 -- Assuming the input 'v' is a value of the form 1...10...0,
253 -- the output is the bit number of the rightmost 1 bit in v.
254 -- If v is zero, the result is zero.
255 function edgelocation(v: std_ulogic_vector; nbits: natural) return std_ulogic_vector is
256 variable p: std_ulogic_vector(nbits - 1 downto 0);
257 variable stride: natural;
258 variable b: std_ulogic;
259 variable k: natural;
260 begin
261 stride := 2;
262 for i in 0 to nbits - 1 loop
263 b := '0';
264 for j in 0 to (2**nbits / stride) - 1 loop
265 k := j * stride;
266 b := b or (v(k + stride - 1) and not v(k + (stride/2) - 1));
267 end loop;
268 p(i) := b;
269 stride := stride * 2;
270 end loop;
271 return p;
272 end function;
273
274 -- Count leading zeroes operations
275 -- Assumes the value passed in is not zero (if it is, zero is returned)
276 function count_right_zeroes(val: std_ulogic_vector) return std_ulogic_vector is
277 variable sum: std_ulogic_vector(val'left downto val'right);
278 variable onehot: std_ulogic_vector(val'left downto val'right);
279 variable edge: std_ulogic_vector(val'left downto val'right);
280 variable bn, bn_e, bn_o: std_ulogic_vector(5 downto 0);
281 begin
282 sum := std_ulogic_vector(- signed(val));
283 onehot := sum and val;
284 edge := sum or val;
285 bn_e := edgelocation(std_ulogic_vector(resize(signed(edge), 64)), 6);
286 bn_o := bit_number(std_ulogic_vector(resize(unsigned(onehot), 64)));
287 bn := bn_e(5 downto 2) & bn_o(1 downto 0);
288 return bn;
289 end;
290
291 function count_left_zeroes(val: std_ulogic_vector) return std_ulogic_vector is
292 variable rev: std_ulogic_vector(val'left downto val'right);
293 begin
294 rev := bit_reverse(val);
295 return count_right_zeroes(rev);
296 end;
297
298 end package body helpers;