686d7c5ca2b4f84936f4b8abd7924e25d4d5cd8e
[riscv-isa-sim.git] / hwacha / insns / vfmst.h
1 require_vector;
2 require_fp;
3 assert(0 <= RS2 && RS2 < MAX_UTS);
4 UT_FRD(RS2) = FRS1;