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ebc1bb0e4e59e4ee5000ea2c07b044b5e8d64af6
[riscv-isa-sim.git]
/
hwacha
/
insns
/
vlsegstbu.h
1
VEC_SEG_ST_LOAD
(
XPR
,
load_uint8
,
XS2
,
1
);