2 * Code for interacting with the FPGA via JTAG.
3 * This file is part of LUNA.
5 * This JTAG driver is intended to be as simple as possible in order to facilitate
6 * configuration and debugging of the attached FPGA. It is not intended to be a general-
13 typedef enum e_TAPState
15 STATE_TEST_LOGIC_RESET
= 0,
16 STATE_RUN_TEST_IDLE
= 1,
17 STATE_SELECT_DR_SCAN
= 2,
24 STATE_SELECT_IR_SCAN
= 9,
25 STATE_CAPTURE_IR
= 10,
35 * Performs the start-of-day tasks necessary to talk JTAG to our FPGA.
41 * De-inits the JTAG connection, so the JTAG chain. is no longer driven.
43 void jtag_deinit(void);
47 * Moves to a given JTAG state.
49 void jtag_goto_state(int state
);
53 * Performs a raw TAP scan.
62 void jtag_wait_time(uint32_t microseconds
);
64 void jtag_go_to_state(unsigned state
);
66 uint8_t jtag_current_state(void);