remove some ice40 specifics
[ecpprog.git] / jtag.h
1 /*
2 * Code for interacting with the FPGA via JTAG.
3 * This file is part of LUNA.
4 *
5 * This JTAG driver is intended to be as simple as possible in order to facilitate
6 * configuration and debugging of the attached FPGA. It is not intended to be a general-
7 * purpose JTAG link.
8 */
9
10 #ifndef __JTAG_H__
11 #define __JTAG_H__
12
13 typedef enum e_TAPState
14 {
15 STATE_TEST_LOGIC_RESET = 0,
16 STATE_RUN_TEST_IDLE = 1,
17 STATE_SELECT_DR_SCAN = 2,
18 STATE_CAPTURE_DR = 3,
19 STATE_SHIFT_DR = 4,
20 STATE_EXIT1_DR = 5,
21 STATE_PAUSE_DR = 6,
22 STATE_EXIT2_DR = 7,
23 STATE_UPDATE_DR = 8,
24 STATE_SELECT_IR_SCAN = 9,
25 STATE_CAPTURE_IR = 10,
26 STATE_SHIFT_IR = 11,
27 STATE_EXIT1_IR = 12,
28 STATE_PAUSE_IR = 13,
29 STATE_EXIT2_IR = 14,
30 STATE_UPDATE_IR = 15
31 } jtag_tap_state_t;
32
33
34 /**
35 * Performs the start-of-day tasks necessary to talk JTAG to our FPGA.
36 */
37 void jtag_init(void);
38
39
40 /**
41 * De-inits the JTAG connection, so the JTAG chain. is no longer driven.
42 */
43 void jtag_deinit(void);
44
45
46 /**
47 * Moves to a given JTAG state.
48 */
49 void jtag_goto_state(int state);
50
51
52 /**
53 * Performs a raw TAP scan.
54 */
55 void jtag_tap_shift(
56 uint8_t *input_data,
57 uint8_t *output_data,
58 uint32_t data_bits,
59 bool must_end);
60
61
62 void jtag_wait_time(uint32_t microseconds);
63
64 void jtag_go_to_state(unsigned state);
65
66 uint8_t jtag_current_state(void);
67
68 #endif