splitting out litex files from soc repo into separate repo
[libresoc-litex.git] / libresoc / ls180_pins.py
1 # auto-generated by Libre-SOC pinmux program: do not edit
2 # python src/pinmux_generator.py -v -s {spec} -o {output}
3 pindict = {
4 'mspi1': [ 'ck+', 'nss+', 'mosi+', 'miso-', ],
5 'mspi0': [ 'ck+', 'nss+', 'mosi+', 'miso-', ],
6 'vss': [ '0-', '1-', '2-', '3-',
7 '4-', ],
8 'vdd': [ '0-', '1-', '2-', '3-',
9 '4-', ],
10 'pwm': [ '0+', '1+', ],
11 'jtag': [ 'tms-', 'tdi-', 'tdo+', 'tck+', ],
12 'vdd': [ '0-', '1-', '2-', ],
13 'sys': [ 'clk-', 'rst-', 'pllclk-', 'pllout+',
14 'csel0-', 'csel1-', 'pllock+', ],
15 'uart0': [ 'tx+', 'rx-', ],
16 'vss': [ '0-', '1-', '2-', ],
17 'sdr': [ 'dqm0+', 'd0*', 'd1*', 'd2*',
18 'd3*', 'd4*', 'd5*', 'd6*',
19 'd7*', 'ad0+', 'ad1+', 'ad2+',
20 'ad3+', 'ad4+', 'ad5+', 'ad6+',
21 'ad7+', 'ad8+', 'ad9+', 'ba0+',
22 'ba1+', 'clk+', 'cke+', 'rasn+',
23 'casn+', 'wen+', 'csn0+', 'ad10+',
24 'ad11+', 'ad12+', 'dqm1*', 'd8*',
25 'd9*', 'd10*', 'd11*', 'd12*',
26 'd13*', 'd14*', 'd15*', ],
27 'gpio': [ 'e8*', 'e9*', 'e10*', 'e11*',
28 'e12*', 'e13*', 'e14*', 'e15*',
29 's0*', 's1*', 's2*', 's3*',
30 's4*', 's5*', 's6*', 's7*', ],
31 'mtwi': [ 'sda*', 'scl+', ],
32 'sd0': [ 'cmd*', 'clk+', 'd0*', 'd1*',
33 'd2*', 'd3*', ],
34 'eint': [ '0-', '1-', '2-', ],
35 }
36
37 litexdict = {
38 'mspi1': [ 'spimaster_clk+', 'spimaster_cs_n+', 'spimaster_mosi+', 'spimaster_miso-', ],
39 'mspi0': [ 'spisdcard_clk+', 'spisdcard_cs_n+', 'spisdcard_mosi+', 'spisdcard_miso-', ],
40 'vss': [ '0-', '1-', '2-', '3-',
41 '4-', ],
42 'vdd': [ '0-', '1-', '2-', '3-',
43 '4-', ],
44 'pwm': [ 'pwm0+', 'pwm1+', ],
45 'jtag': [ 'jtag_tms-', 'jtag_tdi-', 'jtag_tdo+', 'jtag_tck+', ],
46 'vdd': [ '0-', '1-', '2-', ],
47 'sys': [ 'sys_clk-', 'rst-', 'pllclk-', 'sys_pll_18_o+',
48 'sys_clksel_0-', 'sys_clksel_1-', 'sys_pll_lck_o+', ],
49 'uart0': [ 'uart_tx+', 'uart_rx-', ],
50 'vss': [ '0-', '1-', '2-', ],
51 'sdr': [ 'sdram_dm_0+', 'sdram_dq_0*', 'sdram_dq_1*', 'sdram_dq_2*',
52 'sdram_dq_3*', 'sdram_dq_4*', 'sdram_dq_5*', 'sdram_dq_6*',
53 'sdram_dq_7*', 'sdram_a_0+', 'sdram_a_1+', 'sdram_a_2+',
54 'sdram_a_3+', 'sdram_a_4+', 'sdram_a_5+', 'sdram_a_6+',
55 'sdram_a_7+', 'sdram_a_8+', 'sdram_a_9+', 'sdram_ba_0+',
56 'sdram_ba_1+', 'sdram_clock+', 'sdram_cke+', 'sdram_ras_n+',
57 'sdram_cas_n+', 'sdram_we_n+', 'sdram_cs_n+', 'sdram_a_10+',
58 'sdram_a_11+', 'sdram_a_12+', 'sdram_dm_1*', 'sdram_dq_8*',
59 'sdram_dq_9*', 'sdram_dq_10*', 'sdram_dq_11*', 'sdram_dq_12*',
60 'sdram_dq_13*', 'sdram_dq_14*', 'sdram_dq_15*', ],
61 'gpio': [ 'e8*', 'e9*', 'e10*', 'e11*',
62 'e12*', 'e13*', 'e14*', 'e15*',
63 's0*', 's1*', 's2*', 's3*',
64 's4*', 's5*', 's6*', 's7*', ],
65 'mtwi': [ 'i2c_sda*', 'i2c_scl+', ],
66 'sd0': [ 'sdcard_cmd*', 'sdcard_clk+', 'sdcard_data0*', 'sdcard_data1*',
67 'sdcard_data2*', 'sdcard_data3*', ],
68 'eint': [ '0-', '1-', '2-', ],
69 }
70