libresoc/pll.v

   1 module pll(input [0:0] ref_v,
   2            output [0:0] div_out_test,
   3            input [0:0] a0,
   4            input [0:0] a1,
   5            output [0:0] vco_test_ana,
   6            output [0:0] out_v);
   7   /* fake PLL */
   8   assign out_v = ref_v;
   9 endmodule
  10