build/sim: allow for arbitrary clocks generation using clockers
[litex.git] / litex / build / sim / core / veril.cpp
1 /* Copyright (C) 2017 LambdaConcept */
2
3 #include <stdio.h>
4 #include <stdlib.h>
5 #include <string.h>
6 #include <stdint.h>
7 #include "Vsim.h"
8 #include "verilated.h"
9 #ifdef TRACE_FST
10 #include "verilated_fst_c.h"
11 #else
12 #include "verilated_vcd_c.h"
13 #endif
14
15 #ifdef TRACE_FST
16 VerilatedFstC* tfp;
17 #else
18 VerilatedVcdC* tfp;
19 #endif
20 uint64_t tfp_start;
21 uint64_t tfp_end;
22 uint64_t main_time = 0;
23
24 extern "C" void litex_sim_eval(void *vsim)
25 {
26 Vsim *sim = (Vsim*)vsim;
27 sim->eval();
28 }
29
30 extern "C" uint64_t litex_sim_increment_time(unsigned long dt_ps) {
31 main_time += dt_ps;
32 return main_time;
33 }
34
35 extern "C" void litex_sim_init_cmdargs(int argc, char *argv[])
36 {
37 Verilated::commandArgs(argc, argv);
38 }
39
40 extern "C" void litex_sim_init_tracer(void *vsim, long start, long end)
41 {
42 Vsim *sim = (Vsim*)vsim;
43 tfp_start = start;
44 tfp_end = end >= 0 ? end : UINT64_MAX;
45 Verilated::traceEverOn(true);
46 #ifdef TRACE_FST
47 tfp = new VerilatedFstC;
48 sim->trace(tfp, 99);
49 tfp->open("sim.fst");
50 #else
51 tfp = new VerilatedVcdC;
52 sim->trace(tfp, 99);
53 tfp->open("sim.vcd");
54 #endif
55 tfp->set_time_unit("1ps");
56 tfp->set_time_resolution("1ps");
57 }
58
59 extern "C" void litex_sim_tracer_dump()
60 {
61 if (tfp_start <= main_time && main_time <= tfp_end) {
62 tfp->dump(main_time);
63 }
64 }
65
66 extern "C" int litex_sim_got_finish()
67 {
68 return Verilated::gotFinish();
69 }
70
71 #if VM_COVERAGE
72 extern "C" void litex_sim_coverage_dump()
73 {
74 VerilatedCov::write("sim.cov");
75 }
76 #endif
77
78 double sc_time_stamp()
79 {
80 return main_time;
81 }