soc/cores/cpu/vexriscv_smp integration
[litex.git] / litex / soc / cores / cpu / vexriscv_smp / boot-helper.S
1 .section .text, "ax", @progbits
2 .global boot_helper
3 .global smp_lottery_target
4 .global smp_lottery_lock
5 .global smp_lottery_args
6 .global smp_slave
7
8 boot_helper:
9 sw x10, smp_lottery_args , x14
10 sw x11, smp_lottery_args+4, x14
11 sw x12, smp_lottery_args+8, x14
12 sw x13, smp_lottery_target, x14
13 fence w, w
14 li x15, 1
15 sw x15, smp_lottery_lock, x14
16 jr x13
17
18 smp_slave:
19 lw a0, smp_lottery_lock
20 beqz a0, smp_slave
21 fence r, r
22
23 .word(0x100F) //i$ flush
24 lw x10, smp_lottery_args
25 lw x11, smp_lottery_args+4
26 lw x12, smp_lottery_args+8
27 lw x13, smp_lottery_target
28 jr x13
29