68057e3a273b4cff4efb35c2509263431991d986
2 from cocotb
.clock
import Clock
3 from cocotb
.triggers
import Timer
4 from cocotb
.utils
import get_sim_steps
5 from cocotb
.binary
import BinaryValue
7 from c4m
.cocotb
.jtag
.c4m_jtag
import JTAG_Master
8 from c4m
.cocotb
.jtag
.c4m_jtag_svfcocotb
import SVF_Executor
14 def setup_sim(dut
, *, clk_period
, run
):
15 """Initialize CPU and setup clock"""
17 clk_steps
= get_sim_steps(clk_period
, "ns")
18 cocotb
.fork(Clock(dut
.clk_from_pad
, clk_steps
).start())
23 yield Timer(int(10.5*clk_steps
))
25 yield Timer(int(5*clk_steps
))
27 def setup_jtag(dut
, *, tck_period
):
28 # Make this a generator
31 return JTAG_Master(dut
.tck_from_pad
, dut
.tms_from_pad
,
32 dut
.tdi_from_pad
, dut
.tdo_to_pad
,
33 clk_period
=tck_period
,
36 def execute_svf(dut
, *, jtag
, svf_filename
):
37 jtag_svf
= SVF_Executor(jtag
)
38 with
open(svf_filename
, "r") as f
:
40 yield jtag_svf
.run(svf_deck
, p
=dut
._log
.info
)
43 # IDCODE using JTAG_master
46 def idcode(dut
, *, jtag
):
47 #jtag.IDCODE = [0, 0, 0, 1]
50 dut
._log
.info("IDCODE1: {}".format(result1
))
51 assert(result1
== BinaryValue("00000000000000000001100011111111"))
55 dut
._log
.info("IDCODE2: {}".format(result2
))
57 assert(result1
== result2
)
60 def idcode_reset(dut
):
61 dut
._log
.info("Running IDCODE test; cpu in reset...")
63 clk_period
= 100 # 10MHz
64 tck_period
= 300 # 3MHz
66 yield from setup_sim(dut
, clk_period
=clk_period
, run
=False)
67 jtag
= yield from setup_jtag(dut
, tck_period
= tck_period
)
69 yield from idcode(dut
, jtag
=jtag
)
71 dut
._log
.info("IDCODE test completed")
75 dut
._log
.info("Running IDCODE test; cpu running...")
77 clk_period
= 100 # 10MHz
78 tck_period
= 300 # 3MHz
80 yield from setup_sim(dut
, clk_period
=clk_period
, run
=True)
81 jtag
= yield from setup_jtag(dut
, tck_period
= tck_period
)
83 yield from idcode(dut
, jtag
=jtag
)
85 dut
._log
.info("IDCODE test completed")
88 # Read IDCODE from SVF file
92 def idcodesvf_reset(dut
):
93 dut
._log
.info("Running IDCODE through SVF test; cpu in reset...")
95 clk_period
= 100 # 10MHz
96 tck_period
= 300 # 3MHz
98 yield from setup_sim(dut
, clk_period
=clk_period
, run
=False)
99 jtag
= yield from setup_jtag(dut
, tck_period
= tck_period
)
101 yield from execute_svf(dut
, jtag
=jtag
, svf_filename
="idcode.svf")
103 dut
._log
.info("IDCODE test completed")
107 dut
._log
.info("Running IDCODE through test; cpu running...")
109 clk_period
= 100 # 10MHz
110 tck_period
= 300 # 3MHz
112 yield from setup_sim(dut
, clk_period
=clk_period
, run
=True)
113 jtag
= yield from setup_jtag(dut
, tck_period
= tck_period
)
115 yield from execute_svf(dut
, jtag
=jtag
, svf_filename
="idcode.svf")
117 dut
._log
.info("IDCODE test completed")