Update gitignore.
[soc-cocotb-sim.git] / ls180 / pre_pnr / run_iverilog.sh
1 #!/bin/sh
2
3 touch mem.init mem_1.init mem_2.init mem_3.init mem_4.init
4 # Only run test in reset state as running CPU takes too much time to simulate
5 make \
6 SIM=icarus \
7 COCOTB_RESULTS_FILE=results_iverilog.xml \
8 COCOTB_HDL_TIMEUNIT=100ps \
9 TESTCASE="idcode_reset,idcodesvf_reset,boundary_scan_reset" \
10 SIM_BUILD=sim_build_iverilog
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