nmigen_boards/ice40_up5k_b_evn.py

   1 import os
   2 import subprocess
   3
   4 from nmigen.build import *
   5 from nmigen.vendor.lattice_ice40 import *
   6 from .resources import *
   7
   8
   9 __all__ = ["ICE40UP5KBEVNPlatform"]
  10
  11
  12 class ICE40UP5KBEVNPlatform(LatticeICE40Platform):
  13     device      = "iCE40UP5K"
  14     package     = "SG48"
  15     default_clk = "clk12"
  16     resources   = [
  17         # J51 must be connected to use clk12 (it is by default)
  18         Resource("clk12", 0, Pins("35", dir="i"),
  19                  Clock(12e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS")),
  20
  21         # 3 LEDs are present in an RGB common-anode package.
  22         *LEDResources(
  23             pins="39 40 41", invert=True,
  24             attrs=Attrs(IO_STANDARD="SB_LVCMOS")
  25         ),
  26         Resource("led_b", 0, PinsN("39", dir="o"),
  27                  Attrs(IO_STANDARD="SB_LVCMOS")),
  28         Resource("led_g", 0, PinsN("40", dir="o"),
  29                  Attrs(IO_STANDARD="SB_LVCMOS")),
  30         Resource("led_r", 0, PinsN("41", dir="o"),
  31                  Attrs(IO_STANDARD="SB_LVCMOS")),
  32
  33         # 4 DIP switches are available, requiring internal pull-ups.
  34         # The switches' "ON" label points to the position which
  35         # connects them to ground, so invert the inputs.
  36         *SwitchResources(pins="23 25 34 43", invert=True,
  37                          attrs=Attrs(IO_STANDARD="SB_LVCMOS", PULLUP=1)
  38         ),
  39
  40         *SPIFlashResources(0,
  41             cs="16", clk="15", mosi="14", miso="17",
  42             attrs=Attrs(IO_STANDARD="SB_LVCMOS")
  43         ),
  44     ]
  45     connectors  = [
  46         Connector("aardvark", 0, # J1
  47             "- - - - 14 - 15 17 16 -"),
  48         Connector("pmod", 0, # U6 (board), U11 (schematic)
  49             "16 14 17 15 - - 27 26 32 31 - -"),
  50         Connector("j", 0, # 'Header A' (J52)
  51             "- - 39 14 40 17 - 15 41 16 - -"),
  52         Connector("j", 1, # 'Header B' (J2)
  53             "- - 23 - 25 - 26 36 27 42 32 38 31 28 37 15 34 - 43 -"),
  54         Connector("j", 2, # 'Header C' (J3)
  55             "- 12 3 21 3 13 48 20 45 19 47 18 44 11 46 10 2 9 - 6"),
  56     ]
  57
  58     def toolchain_program(self, products, name):
  59         iceprog = os.environ.get("ICEPROG", "iceprog")
  60         with products.extract("{}.bin".format(name)) as bitstream_fn:
  61             subprocess.check_call([iceprog, bitstream_fn])
  62
  63
  64 if __name__ == "__main__":
  65     from .test.blinky import *
  66     ICE40UP5KBEVNPlatform().build(Blinky(), do_program=True)