4 from nmigen
.build
import *
5 from nmigen
.vendor
.intel
import *
6 from .resources
import *
9 __all__
= ["MisterPlatform"]
12 # The MiSTer platform is built around the DE10-Nano; if you update one you should update the other.
13 class MisterPlatform(IntelPlatform
):
14 device
= "5CSEBA6" # Cyclone V 110K LEs
15 package
= "U23" # UBGA-484
19 Resource("clk50", 0, Pins("V11", dir="i"),
20 Clock(50e6
), Attrs(io_standard
="3.3-V LVTTL")),
21 Resource("clk50", 1, Pins("Y13", dir="i"),
22 Clock(50e6
), Attrs(io_standard
="3.3-V LVTTL")),
23 Resource("clk50", 2, Pins("E11", dir="i"),
24 Clock(50e6
), Attrs(io_standard
="3.3-V LVTTL")),
27 pins
="W15 AA24 V16 V15 AF26 AE26 Y16 AA23",
28 attrs
=Attrs(io_standard
="3.3-V LVTTL")),
30 pins
="AH17 AH16", invert
=True,
31 attrs
=Attrs(io_standard
="3.3-V LVTTL")),
33 pins
="Y24 W24 W21 W20",
34 attrs
=Attrs(io_standard
="3.3-V LVTTL")),
39 attrs
=Attrs(io_standard
="3.3-V LVTTL")),
41 # LTC2308 analogue-to-digital converter
43 cs
="U9", clk
="V10", mosi
="AC4", miso
="AD4",
44 attrs
=Attrs(io_standard
="3.3-V LVTTL")),
46 # ADV7513 HDMI transmitter
47 # Note this has a lot of input formats for tx_d, but this defaults to RGB24
48 Resource("adv7513", 0,
49 Subsignal("tx_d_r", Pins("AD12 AE12 W8 Y8 AD11 AD10 AE11 Y5", dir="o")),
50 Subsignal("tx_d_g", Pins("AF10 Y4 AE9 AB4 AE7 AF6 AF8 AF5", dir="o")),
51 Subsignal("tx_d_b", Pins("AE4 AH2 AH4 AH5 AH6 AG6 AF9 AE8", dir="o")),
52 Subsignal("tx_clk", Pins("AG5", dir="o")),
53 Subsignal("tx_de", Pins("AD19", dir="o")),
54 Subsignal("tx_hs", Pins("T8", dir="o")),
55 Subsignal("tx_vs", Pins("V13", dir="o")),
56 Subsignal("tx_int", Pins("AF11", dir="i")),
57 Subsignal("i2s0", Pins("T13", dir="o")),
58 Subsignal("mclk", Pins("U11", dir="o")),
59 Subsignal("lrclk", Pins("T11", dir="o")),
60 Subsignal("sclk", Pins("T12", dir="o")),
61 Subsignal("scl", Pins("U10", dir="o")),
62 Subsignal("sda", Pins("AA4", dir="io")),
63 Attrs(io_standard
="3.3-V LVTTL")),
65 # MiSTer SDRAM Board (required)
66 # https://github.com/MiSTer-devel/Hardware_MiSTer/blob/master/releases/sdram_xs_2.2.pdf
68 clk
="20", cs
="33", we
="27", ras
="32", cas
="31",
69 ba
="34 35", a
="37 38 39 40 28 25 26 23 24 21 36 22 19",
70 dq
="1 2 3 4 5 6 7 8 18 17 16 15 14 13 9 10",
71 dqm
="", conn
=("gpio", 0), attrs
=Attrs(io_standard
="3.3-V LVCMOS")),
73 # MiSTer I/O Board (optional, but highly recommended)
74 # https://github.com/MiSTer-devel/Hardware_MiSTer/blob/master/releases/iobrd_6.0.pdf
75 Resource("power_led", 0, PinsN("1", dir="o", conn
=("gpio", 1)), Attrs(io_standard
="3.3-V LVTTL")),
76 Resource("disk_led", 0, PinsN("3", dir="o", conn
=("gpio", 1)), Attrs(io_standard
="3.3-V LVTTL")),
77 Resource("user_led", 0, PinsN("5", dir="o", conn
=("gpio", 1)), Attrs(io_standard
="3.3-V LVTTL")),
79 Resource("reset_switch", 0, PinsN("17", dir="i", conn
=("gpio", 1)), Attrs(io_standard
="3.3-V LVTTL")),
80 Resource("osd_switch", 0, PinsN("13", dir="i", conn
=("gpio", 1)), Attrs(io_standard
="3.3-V LVTTL")),
81 Resource("user_switch", 0, PinsN("15", dir="i", conn
=("gpio", 1)), Attrs(io_standard
="3.3-V LVTTL")),
84 Subsignal("l", Pins("2", dir="o", conn
=("gpio", 1))),
85 Subsignal("r", Pins("7", dir="o", conn
=("gpio", 1))),
86 Attrs(io_standard
="3.3-V LVTTL")),
88 Resource("toslink", 0, Pins("9", dir="o", conn
=("gpio", 1))),
92 dat0
="16", dat1
="18", dat2
="4", dat3
="6",
93 conn
=("gpio", 1), attrs
=Attrs(io_standard
="3.3-V LVTTL")),
95 # The schematic is difficult to understand here...
97 Subsignal("r", Pins("28 32 34 36 38 40", dir="o", conn
=("gpio", 1))),
98 Subsignal("g", Pins("27 31 33 35 37 39", dir="o", conn
=("gpio", 1))),
99 Subsignal("b", Pins("21 23 25 26 24 24", dir="o", conn
=("gpio", 1))),
100 Subsignal("hs", Pins("20", dir="o", conn
=("gpio", 1))),
101 Subsignal("vs", Pins("19", dir="o", conn
=("gpio", 1))),
102 Attrs(io_standard
="3.3-V LVTTL"))
105 # Located on the top of the board, above the chip.
107 "V12 E8 W12 D11 D8 AH13 AF7 AH14 AF4 AH3 "
108 "- - AD5 AG14 AE23 AE6 AD23 AE24 D12 AD20 "
109 "C12 AD17 AC23 AC22 Y19 AB23 AA19 W11 - - "
110 "AA18 W14 Y18 Y17 AB25 AB26 Y11 AA26 AA13 AA11 "),
111 # Located on the bottom of the board.
113 "Y15 AC24 AA15 AD26 AG28 AF28 AE25 AF27 AG26 AH27 "
114 "- - AG25 AH26 AH24 AF25 AG23 AF23 AG24 AH22 "
115 "AH21 AG21 AH23 AA20 AF22 AE22 AG20 AF21 - - "
116 "AG19 AH19 AG18 AH18 AF18 AF20 AG15 AE20 AE19 AE17 "),
117 Connector("arduino", 0,
118 "AG13 AF13 AG10 AG9 U14 U13 AG8 AH8 "
119 "AF17 AE15 AF15 AG16 AH11 AH12 AH9 AG11 "
123 def toolchain_program(self
, products
, name
):
124 quartus_pgm
= os
.environ
.get("QUARTUS_PGM", "quartus_pgm")
125 with products
.extract("{}.sof".format(name
)) as bitstream_filename
:
126 # The @2 selects the second device in the JTAG chain, because this chip
127 # puts the ARM cores first.
128 subprocess
.check_call([quartus_pgm
, "--haltcc", "--mode", "JTAG",
129 "--operation", "P;" + bitstream_filename
+ "@2"])
132 if __name__
== "__main__":
133 from .test
.blinky
import Blinky
134 MisterPlatform().build(Blinky(), do_program
=True)