nmigen_boards/resources/interface.py

   1 from nmigen.build import *
   2
   3
   4 __all__ = ["UARTResource", "IrDAResource", "SPIResource"]
   5
   6
   7 def UARTResource(*args, rx, tx, rts=None, cts=None, dtr=None, dsr=None, dcd=None, ri=None,
   8                  conn=None, attrs=None, role=None):
   9     if any(line is not None for line in (rts, cts, dtr, dsr, dcd, ri)):
  10         assert role in ("dce", "dte")
  11     if role == "dte":
  12         dce_to_dte = "i"
  13         dte_to_dce = "o"
  14     else:
  15         dce_to_dte = "o"
  16         dte_to_dce = "i"
  17
  18     io = []
  19     io.append(Subsignal("rx", Pins(rx, dir="i", conn=conn, assert_width=1)))
  20     io.append(Subsignal("tx", Pins(tx, dir="o", conn=conn, assert_width=1)))
  21     if rts is not None:
  22         io.append(Subsignal("rts", Pins(rts, dir=dte_to_dce, conn=conn, assert_width=1)))
  23     if cts is not None:
  24         io.append(Subsignal("cts", Pins(cts, dir=dce_to_dte, conn=conn, assert_width=1)))
  25     if dtr is not None:
  26         io.append(Subsignal("dtr", Pins(dtr, dir=dte_to_dce, conn=conn, assert_width=1)))
  27     if dsr is not None:
  28         io.append(Subsignal("dsr", Pins(dsr, dir=dce_to_dte, conn=conn, assert_width=1)))
  29     if dcd is not None:
  30         io.append(Subsignal("dcd", Pins(dcd, dir=dce_to_dte, conn=conn, assert_width=1)))
  31     if ri is not None:
  32         io.append(Subsignal("ri", Pins(ri, dir=dce_to_dte, conn=conn, assert_width=1)))
  33     if attrs is not None:
  34         io.append(attrs)
  35     return Resource.family(*args, default_name="uart", ios=io)
  36
  37
  38 def IrDAResource(number, *, rx, tx, en=None, sd=None,
  39                  conn=None, attrs=None):
  40     # Exactly one of en (active-high enable) or sd (shutdown, active-low enable) should
  41     # be specified, and it is mapped to a logic level en subsignal.
  42     assert (en is not None) ^ (sd is not None)
  43
  44     io = []
  45     io.append(Subsignal("rx", Pins(rx, dir="i", conn=conn, assert_width=1)))
  46     io.append(Subsignal("tx", Pins(tx, dir="o", conn=conn, assert_width=1)))
  47     if en is not None:
  48         io.append(Subsignal("en", Pins(en, dir="o", conn=conn, assert_width=1)))
  49     if sd is not None:
  50         io.append(Subsignal("en", PinsN(sd, dir="o", conn=conn, assert_width=1)))
  51     if attrs is not None:
  52         io.append(attrs)
  53     return Resource("irda", number, *io)
  54
  55
  56 def SPIResource(*args, cs, clk, mosi, miso, int=None, reset=None,
  57                 conn=None, attrs=None, role="host"):
  58     assert role in ("host", "device")
  59
  60     io = []
  61     if role == "host":
  62         io.append(Subsignal("cs", PinsN(cs, dir="o", conn=conn)))
  63         io.append(Subsignal("clk", Pins(clk, dir="o", conn=conn, assert_width=1)))
  64         io.append(Subsignal("mosi", Pins(mosi, dir="o", conn=conn, assert_width=1)))
  65         io.append(Subsignal("miso", Pins(miso, dir="i", conn=conn, assert_width=1)))
  66     else:  # device
  67         io.append(Subsignal("cs", PinsN(cs, dir="i", conn=conn, assert_width=1)))
  68         io.append(Subsignal("clk", Pins(clk, dir="i", conn=conn, assert_width=1)))
  69         io.append(Subsignal("mosi", Pins(mosi, dir="i", conn=conn, assert_width=1)))
  70         io.append(Subsignal("miso", Pins(miso, dir="oe", conn=conn, assert_width=1)))
  71     if int is not None:
  72         if role == "host":
  73             io.append(Subsignal("int", Pins(int, dir="i", conn=conn)))
  74         else:
  75             io.append(Subsignal("int", Pins(int, dir="oe", conn=conn, assert_width=1)))
  76     if reset is not None:
  77         if role == "host":
  78             io.append(Subsignal("reset", Pins(reset, dir="o", conn=conn)))
  79         else:
  80             io.append(Subsignal("reset", Pins(reset, dir="i", conn=conn, assert_width=1)))
  81     if attrs is not None:
  82         io.append(attrs)
  83     return Resource.family(*args, default_name="spi", ios=io)