openpower/isa/bitmanip.mdwn

   1 <!-- Draft Instructions here described in -->
   2 <!-- https://libre-soc.org/openpower/sv/bitmanip/ -->
   3 <!-- These instructions are *not yet official* -->
   4
   5 # Gather instruction
   6
   7 X-Form
   8
   9 * gbbd RT,RA
  10
  11 Pseudo-code:
  12
  13     result <- [0] * 64
  14     do j = 0 to 7
  15         do k = 0 to 7
  16             b <- (RA)[k*8+j]
  17             result[j*8+k] <- b
  18     RT <- result
  19
  20 Special Registers Altered:
  21
  22     CR0                    (if Rc=1)
  23
  24 # Ternary Bitwise Logic Immediate
  25
  26 TLI-Form
  27
  28 * ternlogi RT,RA,RB,TLI (Rc=0)
  29 * ternlogi. RT,RA,RB,TLI (Rc=1)
  30
  31 Pseudo-code:
  32
  33     result <- [0] * XLEN
  34     do i = 0 to XLEN - 1
  35       idx <- (RT)[i] || (RA)[i] || (RB)[i]
  36       result[i] <- TLI[7-idx]
  37     RT <- result
  38
  39 Special Registers Altered:
  40
  41     CR0                    (if Rc=1)
  42
  43 # Condition Register Ternary Bitwise Logic Immediate
  44
  45 CRB-Form
  46
  47 * crternlogi BF,BFA,BFB,TLI,msk
  48
  49 Pseudo-code:
  50
  51     bf <- CR[4*BF+32:4*BF+35]
  52     bfa <- CR[4*BFA+32:4*BFA+35]
  53     bfb <- CR[4*BFB+32:4*BFB+35]
  54
  55     result <- [0] * 4
  56     do i = 0 to 3
  57       idx <- bf[i] || bfa[i] || bfb[i]
  58       result[i] <- TLI[7-idx]
  59     do i = 0 to 3
  60         if msk[i] = 1 then
  61             CR[4*BF+32+i] <- result[i]
  62
  63 Special Registers Altered:
  64
  65      CR field BF
  66
  67 # Add With Shift By Immediate
  68
  69 Z23-Form
  70
  71 * sadd RT,RA,RB,SH (Rc=0)
  72 * sadd. RT,RA,RB,SH (Rc=1)
  73
  74 Pseudo-code:
  75
  76     n <- (RB)
  77     m <- ((0b0 || SH) + 1)
  78     RT <- (n[m:XLEN-1] || [0]*m) + (RA)
  79
  80 Special Registers Altered:
  81
  82     CR0                    (if Rc=1)
  83
  84 # Add With Shift By Immediate Word
  85
  86 Z23-Form
  87
  88 * saddw RT,RA,RB,SH (Rc=0)
  89 * saddw. RT,RA,RB,SH (Rc=1)
  90
  91 Pseudo-code:
  92
  93     n <- ([0]*(XLEN/2)) || (RB)[XLEN/2:XLEN-1]
  94     if (RB)[XLEN/2] = 1 then
  95         n[0:XLEN/2-1] <- [1]*(XLEN/2)
  96     m <- ((0b0 || SH) + 1)
  97     RT <- (n[m:XLEN-1] || [0]*m) + (RA)
  98
  99 Special Registers Altered:
 100
 101     CR0                    (if Rc=1)
 102
 103 # Add With Shift By Immediate Unsigned Word
 104
 105 Z23-Form
 106
 107 * sadduw RT,RA,RB,SH (Rc=0)
 108 * sadduw. RT,RA,RB,SH (Rc=1)
 109
 110 Pseudo-code:
 111
 112     n <- ([0]*(XLEN/2)) || (RB)[XLEN/2:XLEN-1]
 113     m <- ((0b0 || SH) + 1)
 114     RT <- (n[m:XLEN-1] || [0]*m) + (RA)
 115
 116 Special Registers Altered:
 117
 118     CR0                    (if Rc=1)