2 Copyright (c) 2020 Peter Hsu. All Rights Reserved. See LICENCE file for details.
8 Instruction buffer is two-line cache with subblocking.
12 long* ready
[2]; /* ready[2][numblks] */
13 long tag_mask
; /* pc mask = (1 << lg_line) - 1 */
14 long blk_mask
; /* block index mask = numblks - 1 */
15 long subblockmask
; /* = ~0UL << ib->lg_blksize */
16 long curblk
; /* pc of current ibuffer subblock */
17 long misses
; /* number of misses */
18 long bufsz
; /* log-base-2 of capacity (bytes) */
19 long blksize
; /* log-base-2 of block size (bytes) */
20 long numblks
; /* = (1<<lg_line)/(1<<lg_blksize) */
21 long penalty
; /* cycles to refill critical block */
22 long delay
; /* taken branch delay (pipeline flush) */
23 int mru
; /* which tag is most recently used */
26 extern struct ibuf_t ib
; /* instruction buffer model */
27 extern struct cache_t ic
; /* instruction cache model */
28 extern struct cache_t dc
; /* data cache model */
30 extern struct fifo_t
* in
; /* input fifo */
31 extern struct fifo_t
* out
; /* output fifo (optional) */
34 extern uint64_t mem_queue
[tr_memq_len
];
36 extern long quiet
, report
;
39 void perfCounters_init(const char* shm_name
, int reader
);
40 void status_report(long now
, long icount
);
42 void fast_pipe(long next_report
, long (*model_dcache
)(long tr
, const struct insn_t
* p
, long available
));
43 void trace_pipe(long next_report
, long (*model_dcache
)(long tr
, const struct insn_t
* p
, long available
));
44 void count_pipe(long next_report
, long (*model_dcache
)(long tr
, const struct insn_t
* p
, long available
));
45 void trace_count_pipe(long next_report
, long (*model_dcache
)(long tr
, const struct insn_t
* p
, long available
));
47 long dcache_writethru(long tr
, const struct insn_t
* p
, long available
);
48 long dcache_writeback(long tr
, const struct insn_t
* p
, long available
);