3 #include "debug_module.h"
4 #include "debug_defines.h"
8 #include "debug_rom/debug_rom.h"
9 #include "debug_rom_defines.h"
17 ///////////////////////// debug_module_t
19 debug_module_t::debug_module_t(sim_t
*sim
, unsigned progbufsize
, unsigned max_bus_master_bits
,
20 bool require_authentication
) :
21 progbufsize(progbufsize
),
22 program_buffer_bytes(4 + 4*progbufsize
),
23 max_bus_master_bits(max_bus_master_bits
),
24 require_authentication(require_authentication
),
25 debug_progbuf_start(debug_data_start
- program_buffer_bytes
),
26 debug_abstract_start(debug_progbuf_start
- debug_abstract_size
*4),
29 D(fprintf(stderr
, "debug_data_start=0x%x\n", debug_data_start
));
30 D(fprintf(stderr
, "debug_progbuf_start=0x%x\n", debug_progbuf_start
));
31 D(fprintf(stderr
, "debug_abstract_start=0x%x\n", debug_abstract_start
));
33 program_buffer
= new uint8_t[program_buffer_bytes
];
35 memset(halted
, 0, sizeof(halted
));
36 memset(debug_rom_flags
, 0, sizeof(debug_rom_flags
));
37 memset(resumeack
, 0, sizeof(resumeack
));
38 memset(program_buffer
, 0, program_buffer_bytes
);
39 program_buffer
[4*progbufsize
] = ebreak();
40 program_buffer
[4*progbufsize
+1] = ebreak() >> 8;
41 program_buffer
[4*progbufsize
+2] = ebreak() >> 16;
42 program_buffer
[4*progbufsize
+3] = ebreak() >> 24;
43 memset(dmdata
, 0, sizeof(dmdata
));
45 write32(debug_rom_whereto
, 0,
46 jal(ZERO
, debug_abstract_start
- DEBUG_ROM_WHERETO
));
48 memset(debug_abstract
, 0, sizeof(debug_abstract
));
53 debug_module_t::~debug_module_t()
55 delete[] program_buffer
;
58 void debug_module_t::reset()
60 for (unsigned i
= 0; i
< sim
->nprocs(); i
++) {
61 processor_t
*proc
= sim
->get_core(i
);
63 proc
->halt_request
= false;
69 dmstatus
.impebreak
= true;
70 dmstatus
.authenticated
= !require_authentication
;
74 abstractcs
.datacount
= sizeof(dmdata
) / 4;
75 abstractcs
.progbufsize
= progbufsize
;
80 if (max_bus_master_bits
> 0) {
82 sbcs
.asize
= sizeof(reg_t
) * 8;
84 if (max_bus_master_bits
>= 64)
86 if (max_bus_master_bits
>= 32)
88 if (max_bus_master_bits
>= 16)
90 if (max_bus_master_bits
>= 8)
96 void debug_module_t::add_device(bus_t
*bus
) {
97 bus
->add_device(DEBUG_START
, this);
100 bool debug_module_t::load(reg_t addr
, size_t len
, uint8_t* bytes
)
102 addr
= DEBUG_START
+ addr
;
104 if (addr
>= DEBUG_ROM_ENTRY
&&
105 (addr
+ len
) <= (DEBUG_ROM_ENTRY
+ debug_rom_raw_len
)) {
106 memcpy(bytes
, debug_rom_raw
+ addr
- DEBUG_ROM_ENTRY
, len
);
110 if (addr
>= DEBUG_ROM_WHERETO
&& (addr
+ len
) <= (DEBUG_ROM_WHERETO
+ 4)) {
111 memcpy(bytes
, debug_rom_whereto
+ addr
- DEBUG_ROM_WHERETO
, len
);
115 if (addr
>= DEBUG_ROM_FLAGS
&& ((addr
+ len
) <= DEBUG_ROM_FLAGS
+ 1024)) {
116 memcpy(bytes
, debug_rom_flags
+ addr
- DEBUG_ROM_FLAGS
, len
);
120 if (addr
>= debug_abstract_start
&& ((addr
+ len
) <= (debug_abstract_start
+ sizeof(debug_abstract
)))) {
121 memcpy(bytes
, debug_abstract
+ addr
- debug_abstract_start
, len
);
125 if (addr
>= debug_data_start
&& (addr
+ len
) <= (debug_data_start
+ sizeof(dmdata
))) {
126 memcpy(bytes
, dmdata
+ addr
- debug_data_start
, len
);
130 if (addr
>= debug_progbuf_start
&& ((addr
+ len
) <= (debug_progbuf_start
+ program_buffer_bytes
))) {
131 memcpy(bytes
, program_buffer
+ addr
- debug_progbuf_start
, len
);
135 fprintf(stderr
, "ERROR: invalid load from debug module: %zd bytes at 0x%016"
136 PRIx64
"\n", len
, addr
);
141 bool debug_module_t::store(reg_t addr
, size_t len
, const uint8_t* bytes
)
146 fprintf(stderr
, "store(addr=0x%lx, len=%d, bytes=0x%08x); "
147 "hartsel=0x%x\n", addr
, (unsigned) len
, *(uint32_t *) bytes
,
151 fprintf(stderr
, "store(addr=0x%lx, len=%d, bytes=...); "
152 "hartsel=0x%x\n", addr
, (unsigned) len
, dmcontrol
.hartsel
);
160 memcpy(id_bytes
, bytes
, 4);
161 id
= read32(id_bytes
, 0);
164 addr
= DEBUG_START
+ addr
;
166 if (addr
>= debug_data_start
&& (addr
+ len
) <= (debug_data_start
+ sizeof(dmdata
))) {
167 memcpy(dmdata
+ addr
- debug_data_start
, bytes
, len
);
171 if (addr
>= debug_progbuf_start
&& ((addr
+ len
) <= (debug_progbuf_start
+ program_buffer_bytes
))) {
172 memcpy(program_buffer
+ addr
- debug_progbuf_start
, bytes
, len
);
177 if (addr
== DEBUG_ROM_HALTED
) {
180 if (dmcontrol
.hartsel
== id
) {
181 if (0 == (debug_rom_flags
[id
] & (1 << DEBUG_ROM_FLAG_GO
))){
182 if (dmcontrol
.hartsel
== id
) {
183 abstractcs
.busy
= false;
190 if (addr
== DEBUG_ROM_GOING
) {
191 debug_rom_flags
[dmcontrol
.hartsel
] &= ~(1 << DEBUG_ROM_FLAG_GO
);
195 if (addr
== DEBUG_ROM_RESUMING
) {
198 resumeack
[id
] = true;
199 debug_rom_flags
[id
] &= ~(1 << DEBUG_ROM_FLAG_RESUME
);
203 if (addr
== DEBUG_ROM_EXCEPTION
) {
204 if (abstractcs
.cmderr
== CMDERR_NONE
) {
205 abstractcs
.cmderr
= CMDERR_EXCEPTION
;
210 fprintf(stderr
, "ERROR: invalid store to debug module: %zd bytes at 0x%016"
211 PRIx64
"\n", len
, addr
);
215 void debug_module_t::write32(uint8_t *memory
, unsigned int index
, uint32_t value
)
217 uint8_t* base
= memory
+ index
* 4;
218 base
[0] = value
& 0xff;
219 base
[1] = (value
>> 8) & 0xff;
220 base
[2] = (value
>> 16) & 0xff;
221 base
[3] = (value
>> 24) & 0xff;
224 uint32_t debug_module_t::read32(uint8_t *memory
, unsigned int index
)
226 uint8_t* base
= memory
+ index
* 4;
227 uint32_t value
= ((uint32_t) base
[0]) |
228 (((uint32_t) base
[1]) << 8) |
229 (((uint32_t) base
[2]) << 16) |
230 (((uint32_t) base
[3]) << 24);
234 processor_t
*debug_module_t::current_proc() const
236 processor_t
*proc
= NULL
;
238 proc
= sim
->get_core(dmcontrol
.hartsel
);
239 } catch (const std::out_of_range
&) {
244 unsigned debug_module_t::sb_access_bits()
246 return 8 << sbcs
.sbaccess
;
249 void debug_module_t::sb_autoincrement()
251 if (!sbcs
.autoincrement
|| !max_bus_master_bits
)
254 uint64_t value
= sbaddress
[0] + sb_access_bits() / 8;
255 sbaddress
[0] = value
;
256 uint32_t carry
= value
>> 32;
258 value
= sbaddress
[1] + carry
;
259 sbaddress
[1] = value
;
262 value
= sbaddress
[2] + carry
;
263 sbaddress
[2] = value
;
266 sbaddress
[3] += carry
;
269 void debug_module_t::sb_read()
271 reg_t address
= ((uint64_t) sbaddress
[1] << 32) | sbaddress
[0];
273 if (sbcs
.sbaccess
== 0 && max_bus_master_bits
>= 8) {
274 sbdata
[0] = sim
->debug_mmu
->load_uint8(address
);
275 } else if (sbcs
.sbaccess
== 1 && max_bus_master_bits
>= 16) {
276 sbdata
[0] = sim
->debug_mmu
->load_uint16(address
);
277 } else if (sbcs
.sbaccess
== 2 && max_bus_master_bits
>= 32) {
278 sbdata
[0] = sim
->debug_mmu
->load_uint32(address
);
279 } else if (sbcs
.sbaccess
== 3 && max_bus_master_bits
>= 64) {
280 uint64_t value
= sim
->debug_mmu
->load_uint32(address
);
282 sbdata
[1] = value
>> 32;
286 } catch (trap_load_access_fault
& t
) {
291 void debug_module_t::sb_write()
293 reg_t address
= ((uint64_t) sbaddress
[1] << 32) | sbaddress
[0];
294 D(fprintf(stderr
, "sb_write() 0x%x @ 0x%lx\n", sbdata
[0], address
));
295 if (sbcs
.sbaccess
== 0 && max_bus_master_bits
>= 8) {
296 sim
->debug_mmu
->store_uint8(address
, sbdata
[0]);
297 } else if (sbcs
.sbaccess
== 1 && max_bus_master_bits
>= 16) {
298 sim
->debug_mmu
->store_uint16(address
, sbdata
[0]);
299 } else if (sbcs
.sbaccess
== 2 && max_bus_master_bits
>= 32) {
300 sim
->debug_mmu
->store_uint32(address
, sbdata
[0]);
301 } else if (sbcs
.sbaccess
== 3 && max_bus_master_bits
>= 64) {
302 sim
->debug_mmu
->store_uint64(address
,
303 (((uint64_t) sbdata
[1]) << 32) | sbdata
[0]);
309 bool debug_module_t::dmi_read(unsigned address
, uint32_t *value
)
312 D(fprintf(stderr
, "dmi_read(0x%x) -> ", address
));
313 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ abstractcs
.datacount
) {
314 unsigned i
= address
- DMI_DATA0
;
315 result
= read32(dmdata
, i
);
316 if (abstractcs
.busy
) {
318 fprintf(stderr
, "\ndmi_read(0x%02x (data[%d]) -> -1 because abstractcs.busy==true\n", address
, i
);
321 if (abstractcs
.busy
&& abstractcs
.cmderr
== CMDERR_NONE
) {
322 abstractcs
.cmderr
= CMDERR_BUSY
;
325 if (!abstractcs
.busy
&& ((abstractauto
.autoexecdata
>> i
) & 1)) {
326 perform_abstract_command();
328 } else if (address
>= DMI_PROGBUF0
&& address
< DMI_PROGBUF0
+ progbufsize
) {
329 unsigned i
= address
- DMI_PROGBUF0
;
330 result
= read32(program_buffer
, i
);
331 if (abstractcs
.busy
) {
333 fprintf(stderr
, "\ndmi_read(0x%02x (progbuf[%d]) -> -1 because abstractcs.busy==true\n", address
, i
);
335 if (!abstractcs
.busy
&& ((abstractauto
.autoexecprogbuf
>> i
) & 1)) {
336 perform_abstract_command();
343 processor_t
*proc
= current_proc();
345 dmcontrol
.haltreq
= proc
->halt_request
;
347 result
= set_field(result
, DMI_DMCONTROL_HALTREQ
, dmcontrol
.haltreq
);
348 result
= set_field(result
, DMI_DMCONTROL_RESUMEREQ
, dmcontrol
.resumereq
);
349 result
= set_field(result
, ((1L<<hartsellen
)-1) <<
350 DMI_DMCONTROL_HARTSEL_OFFSET
, dmcontrol
.hartsel
);
351 result
= set_field(result
, DMI_DMCONTROL_HARTRESET
, dmcontrol
.hartreset
);
352 result
= set_field(result
, DMI_DMCONTROL_NDMRESET
, dmcontrol
.ndmreset
);
353 result
= set_field(result
, DMI_DMCONTROL_DMACTIVE
, dmcontrol
.dmactive
);
358 processor_t
*proc
= current_proc();
360 dmstatus
.allnonexistant
= false;
361 dmstatus
.allunavail
= false;
362 dmstatus
.allrunning
= false;
363 dmstatus
.allhalted
= false;
364 dmstatus
.allresumeack
= false;
366 if (halted
[dmcontrol
.hartsel
]) {
367 dmstatus
.allhalted
= true;
369 dmstatus
.allrunning
= true;
372 dmstatus
.allnonexistant
= true;
374 dmstatus
.anynonexistant
= dmstatus
.allnonexistant
;
375 dmstatus
.anyunavail
= dmstatus
.allunavail
;
376 dmstatus
.anyrunning
= dmstatus
.allrunning
;
377 dmstatus
.anyhalted
= dmstatus
.allhalted
;
379 if (resumeack
[dmcontrol
.hartsel
]) {
380 dmstatus
.allresumeack
= true;
382 dmstatus
.allresumeack
= false;
385 dmstatus
.allresumeack
= false;
388 result
= set_field(result
, DMI_DMSTATUS_IMPEBREAK
,
390 result
= set_field(result
, DMI_DMSTATUS_ALLNONEXISTENT
, dmstatus
.allnonexistant
);
391 result
= set_field(result
, DMI_DMSTATUS_ALLUNAVAIL
, dmstatus
.allunavail
);
392 result
= set_field(result
, DMI_DMSTATUS_ALLRUNNING
, dmstatus
.allrunning
);
393 result
= set_field(result
, DMI_DMSTATUS_ALLHALTED
, dmstatus
.allhalted
);
394 result
= set_field(result
, DMI_DMSTATUS_ALLRESUMEACK
, dmstatus
.allresumeack
);
395 result
= set_field(result
, DMI_DMSTATUS_ANYNONEXISTENT
, dmstatus
.anynonexistant
);
396 result
= set_field(result
, DMI_DMSTATUS_ANYUNAVAIL
, dmstatus
.anyunavail
);
397 result
= set_field(result
, DMI_DMSTATUS_ANYRUNNING
, dmstatus
.anyrunning
);
398 result
= set_field(result
, DMI_DMSTATUS_ANYHALTED
, dmstatus
.anyhalted
);
399 result
= set_field(result
, DMI_DMSTATUS_ANYRESUMEACK
, dmstatus
.anyresumeack
);
400 result
= set_field(result
, DMI_DMSTATUS_AUTHENTICATED
, dmstatus
.authenticated
);
401 result
= set_field(result
, DMI_DMSTATUS_AUTHBUSY
, dmstatus
.authbusy
);
402 result
= set_field(result
, DMI_DMSTATUS_VERSION
, dmstatus
.version
);
406 result
= set_field(result
, DMI_ABSTRACTCS_CMDERR
, abstractcs
.cmderr
);
407 result
= set_field(result
, DMI_ABSTRACTCS_BUSY
, abstractcs
.busy
);
408 result
= set_field(result
, DMI_ABSTRACTCS_DATACOUNT
, abstractcs
.datacount
);
409 result
= set_field(result
, DMI_ABSTRACTCS_PROGBUFSIZE
,
410 abstractcs
.progbufsize
);
412 case DMI_ABSTRACTAUTO
:
413 result
= set_field(result
, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF
, abstractauto
.autoexecprogbuf
);
414 result
= set_field(result
, DMI_ABSTRACTAUTO_AUTOEXECDATA
, abstractauto
.autoexecdata
);
420 result
= set_field(result
, DMI_HARTINFO_NSCRATCH
, 1);
421 result
= set_field(result
, DMI_HARTINFO_DATAACCESS
, 1);
422 result
= set_field(result
, DMI_HARTINFO_DATASIZE
, abstractcs
.datacount
);
423 result
= set_field(result
, DMI_HARTINFO_DATAADDR
, debug_data_start
);
426 result
= set_field(result
, DMI_SBCS_SBVERSION
, sbcs
.version
);
427 result
= set_field(result
, DMI_SBCS_SBREADONADDR
, sbcs
.readonaddr
);
428 result
= set_field(result
, DMI_SBCS_SBACCESS
, sbcs
.sbaccess
);
429 result
= set_field(result
, DMI_SBCS_SBAUTOINCREMENT
, sbcs
.autoincrement
);
430 result
= set_field(result
, DMI_SBCS_SBREADONDATA
, sbcs
.readondata
);
431 result
= set_field(result
, DMI_SBCS_SBERROR
, sbcs
.error
);
432 result
= set_field(result
, DMI_SBCS_SBASIZE
, sbcs
.asize
);
433 result
= set_field(result
, DMI_SBCS_SBACCESS128
, sbcs
.access128
);
434 result
= set_field(result
, DMI_SBCS_SBACCESS64
, sbcs
.access64
);
435 result
= set_field(result
, DMI_SBCS_SBACCESS32
, sbcs
.access32
);
436 result
= set_field(result
, DMI_SBCS_SBACCESS16
, sbcs
.access16
);
437 result
= set_field(result
, DMI_SBCS_SBACCESS8
, sbcs
.access8
);
440 result
= sbaddress
[0];
443 result
= sbaddress
[1];
446 result
= sbaddress
[2];
449 result
= sbaddress
[3];
453 if (sbcs
.error
== 0) {
455 if (sbcs
.readondata
) {
474 D(fprintf(stderr
, "Unexpected. Returning Error."));
478 D(fprintf(stderr
, "0x%x\n", result
));
483 bool debug_module_t::perform_abstract_command()
485 if (abstractcs
.cmderr
!= CMDERR_NONE
)
487 if (abstractcs
.busy
) {
488 abstractcs
.cmderr
= CMDERR_BUSY
;
492 if ((command
>> 24) == 0) {
494 unsigned size
= get_field(command
, AC_ACCESS_REGISTER_SIZE
);
495 bool write
= get_field(command
, AC_ACCESS_REGISTER_WRITE
);
496 unsigned regno
= get_field(command
, AC_ACCESS_REGISTER_REGNO
);
498 if (!halted
[dmcontrol
.hartsel
]) {
499 abstractcs
.cmderr
= CMDERR_HALTRESUME
;
504 if (get_field(command
, AC_ACCESS_REGISTER_TRANSFER
)) {
506 if (regno
< 0x1000 && progbufsize
< 2) {
507 // Make the debugger use the program buffer if it's available, so it
508 // can test both use cases.
509 write32(debug_abstract
, i
++, csrw(S0
, CSR_DSCRATCH
));
514 write32(debug_abstract
, i
++, lw(S0
, ZERO
, debug_data_start
));
517 write32(debug_abstract
, i
++, ld(S0
, ZERO
, debug_data_start
));
520 abstractcs
.cmderr
= CMDERR_NOTSUP
;
523 write32(debug_abstract
, i
++, csrw(S0
, regno
));
526 write32(debug_abstract
, i
++, csrr(S0
, regno
));
529 write32(debug_abstract
, i
++, sw(S0
, ZERO
, debug_data_start
));
532 write32(debug_abstract
, i
++, sd(S0
, ZERO
, debug_data_start
));
535 abstractcs
.cmderr
= CMDERR_NOTSUP
;
539 write32(debug_abstract
, i
++, csrr(S0
, CSR_DSCRATCH
));
541 } else if (regno
>= 0x1000 && regno
< 0x1020) {
542 unsigned regnum
= regno
- 0x1000;
547 write32(debug_abstract
, i
++, lw(regnum
, ZERO
, debug_data_start
));
549 write32(debug_abstract
, i
++, sw(regnum
, ZERO
, debug_data_start
));
553 write32(debug_abstract
, i
++, ld(regnum
, ZERO
, debug_data_start
));
555 write32(debug_abstract
, i
++, sd(regnum
, ZERO
, debug_data_start
));
558 abstractcs
.cmderr
= CMDERR_NOTSUP
;
562 } else if (regno
>= 0x1020 && regno
< 0x1040) {
563 // Don't force the debugger to use progbuf if it exists, so the
564 // debugger has to make the decision not to use abstract commands to
565 // access 64-bit FPRs on 32-bit targets.
566 unsigned fprnum
= regno
- 0x1020;
571 write32(debug_abstract
, i
++, flw(fprnum
, ZERO
, debug_data_start
));
574 write32(debug_abstract
, i
++, fld(fprnum
, ZERO
, debug_data_start
));
577 abstractcs
.cmderr
= CMDERR_NOTSUP
;
584 write32(debug_abstract
, i
++, fsw(fprnum
, ZERO
, debug_data_start
));
587 write32(debug_abstract
, i
++, fsd(fprnum
, ZERO
, debug_data_start
));
590 abstractcs
.cmderr
= CMDERR_NOTSUP
;
596 abstractcs
.cmderr
= CMDERR_NOTSUP
;
601 if (get_field(command
, AC_ACCESS_REGISTER_POSTEXEC
)) {
602 write32(debug_abstract
, i
,
603 jal(ZERO
, debug_progbuf_start
- debug_abstract_start
- 4 * i
));
606 write32(debug_abstract
, i
++, ebreak());
609 debug_rom_flags
[dmcontrol
.hartsel
] |= 1 << DEBUG_ROM_FLAG_GO
;
611 abstractcs
.busy
= true;
613 abstractcs
.cmderr
= CMDERR_NOTSUP
;
618 bool debug_module_t::dmi_write(unsigned address
, uint32_t value
)
620 D(fprintf(stderr
, "dmi_write(0x%x, 0x%x)\n", address
, value
));
622 if (!dmstatus
.authenticated
&& address
!= DMI_AUTHDATA
&&
623 address
!= DMI_DMCONTROL
)
626 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ abstractcs
.datacount
) {
627 unsigned i
= address
- DMI_DATA0
;
628 if (!abstractcs
.busy
)
629 write32(dmdata
, address
- DMI_DATA0
, value
);
631 if (abstractcs
.busy
&& abstractcs
.cmderr
== CMDERR_NONE
) {
632 abstractcs
.cmderr
= CMDERR_BUSY
;
635 if (!abstractcs
.busy
&& ((abstractauto
.autoexecdata
>> i
) & 1)) {
636 perform_abstract_command();
640 } else if (address
>= DMI_PROGBUF0
&& address
< DMI_PROGBUF0
+ progbufsize
) {
641 unsigned i
= address
- DMI_PROGBUF0
;
643 if (!abstractcs
.busy
)
644 write32(program_buffer
, i
, value
);
646 if (!abstractcs
.busy
&& ((abstractauto
.autoexecprogbuf
>> i
) & 1)) {
647 perform_abstract_command();
655 if (!dmcontrol
.dmactive
&& get_field(value
, DMI_DMCONTROL_DMACTIVE
))
657 dmcontrol
.dmactive
= get_field(value
, DMI_DMCONTROL_DMACTIVE
);
658 if (!dmstatus
.authenticated
)
660 if (dmcontrol
.dmactive
) {
661 dmcontrol
.haltreq
= get_field(value
, DMI_DMCONTROL_HALTREQ
);
662 dmcontrol
.resumereq
= get_field(value
, DMI_DMCONTROL_RESUMEREQ
);
663 dmcontrol
.hartreset
= get_field(value
, DMI_DMCONTROL_HARTRESET
);
664 dmcontrol
.ndmreset
= get_field(value
, DMI_DMCONTROL_NDMRESET
);
665 dmcontrol
.hartsel
= get_field(value
, ((1L<<hartsellen
)-1) <<
666 DMI_DMCONTROL_HARTSEL_OFFSET
);
668 processor_t
*proc
= current_proc();
670 proc
->halt_request
= dmcontrol
.haltreq
;
671 if (dmcontrol
.resumereq
) {
672 debug_rom_flags
[dmcontrol
.hartsel
] |= (1 << DEBUG_ROM_FLAG_RESUME
);
673 resumeack
[dmcontrol
.hartsel
] = false;
675 if (dmcontrol
.hartreset
) {
679 if (dmcontrol
.ndmreset
) {
680 for (size_t i
= 0; i
< sim
->nprocs(); i
++) {
681 proc
= sim
->get_core(i
);
690 return perform_abstract_command();
693 abstractcs
.cmderr
= (cmderr_t
) (((uint32_t) (abstractcs
.cmderr
)) & (~(uint32_t)(get_field(value
, DMI_ABSTRACTCS_CMDERR
))));
696 case DMI_ABSTRACTAUTO
:
697 abstractauto
.autoexecprogbuf
= get_field(value
,
698 DMI_ABSTRACTAUTO_AUTOEXECPROGBUF
);
699 abstractauto
.autoexecdata
= get_field(value
,
700 DMI_ABSTRACTAUTO_AUTOEXECDATA
);
703 sbcs
.readonaddr
= get_field(value
, DMI_SBCS_SBREADONADDR
);
704 sbcs
.sbaccess
= get_field(value
, DMI_SBCS_SBACCESS
);
705 sbcs
.autoincrement
= get_field(value
, DMI_SBCS_SBAUTOINCREMENT
);
706 sbcs
.readondata
= get_field(value
, DMI_SBCS_SBREADONDATA
);
707 sbcs
.error
&= ~get_field(value
, DMI_SBCS_SBERROR
);
710 sbaddress
[0] = value
;
711 if (sbcs
.error
== 0 && sbcs
.readonaddr
) {
716 sbaddress
[1] = value
;
719 sbaddress
[2] = value
;
722 sbaddress
[3] = value
;
726 if (sbcs
.error
== 0) {
728 if (sbcs
.autoincrement
&& sbcs
.error
== 0) {
743 D(fprintf(stderr
, "debug authentication: got 0x%x; 0x%x unlocks\n", value
,
744 challenge
+ secret
));
745 if (require_authentication
) {
746 if (value
== challenge
+ secret
) {
747 dmstatus
.authenticated
= true;
749 dmstatus
.authenticated
= false;
750 challenge
= random();