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91be911b9556c709ff92787ed7f543c9cb8a7eee
[riscv-isa-sim.git]
/
riscv
/
insns
/
jalr_c.h
1
reg_t temp
=
RS1
;
2
RD
=
npc
;
3
set_pc
(
temp
+
SIMM
);