projects
/
riscv-isa-sim.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
81ba7dec7f4c28c95007b651ca88e08babeb365a
[riscv-isa-sim.git]
/
riscv
/
insns
/
lb.h
1
RD
=
mmu
.
load_int8
(
RS1
+
SIMM
);