d9fe109511dc5b6d1b7f5eb01058cc20c00c8a3e
[riscv-isa-sim.git] / riscv / insns / nmsub_s.h
1 require_fp;
2 FRC = f32_mulAdd(FRA, FRB, FRD ^ (uint32_t)INT32_MIN) ^ (uint32_t)INT32_MIN;
3 set_fp_exceptions;