runsimsoc_hyperram.sh

   1 #!/bin/bash
   2 set -e
   3
   4 LIB_DIR=./src/ecp5u
   5
   6 HYPERRAM_DIR=./hyperram_model/s27kl0641/model
   7
   8 # create the build_simsoc/top.il file with firmware baked-in
   9 python3 src/ls2.py isim ./coldboot/coldboot.bin
  10
  11 # do some voodoo magic to get icarus to be happy with the ilang file
  12 yosys simsoc.ys
  13
  14 # fix a bug in Lattice ECP5 models
  15 cp ${LIB_DIR}/DDRDLLA.v DDRDLLA.v
  16 patch DDRDLLA.v < DDRDLLA.patch
  17
  18 # string together the icarus verilog files and start runnin
  19 iverilog -Wall -g2012 -s simsoc_hyperram_tb -o simsoc \
  20         src/simsoc_hyperram_tb.v ./top.v \
  21     ${HYPERRAM_DIR}/s27kl0641.v \
  22     ${LIB_DIR}/ECLKSYNCB.v ${LIB_DIR}/EHXPLLL.v \
  23     ${LIB_DIR}/PUR.v ${LIB_DIR}/GSR.v \
  24         ${LIB_DIR}/FD1S3AX.v ${LIB_DIR}/SGSR.v ${LIB_DIR}/ODDRX2F.v \
  25     ${LIB_DIR}/ODDRX2DQA.v ${LIB_DIR}/DELAYF.v ${LIB_DIR}/BB.v \
  26     ${LIB_DIR}/OB.v ${LIB_DIR}/IB.v \
  27         ${LIB_DIR}/DQSBUFM.v ${LIB_DIR}/UDFDL5_UDP_X.v \
  28     ${LIB_DIR}/TSHX2DQSA.v ${LIB_DIR}/TSHX2DQA.v \
  29     ${LIB_DIR}/ODDRX2DQSB.v ${LIB_DIR}/IDDRX2DQA.v \
  30     DDRDLLA.v \
  31         ${LIB_DIR}/CLKDIVF.v
  32 vvp -n simsoc -fst-speed