sim/Makefile.in

   1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
   2 # @configure_input@
   3
   4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
   5
   6 # This Makefile.in is free software; the Free Software Foundation
   7 # gives unlimited permission to copy and/or distribute it,
   8 # with or without modifications, as long as this notice is preserved.
   9
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
  12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
  13 # PARTICULAR PURPOSE.
  14
  15 @SET_MAKE@
  16
  17 #   Copyright (C) 1993-2023 Free Software Foundation, Inc.
  18 #
  19 # This program is free software; you can redistribute it and/or modify
  20 # it under the terms of the GNU General Public License as published by
  21 # the Free Software Foundation; either version 3 of the License, or
  22 # (at your option) any later version.
  23 #
  24 # This program is distributed in the hope that it will be useful,
  25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 # GNU General Public License for more details.
  28 #
  29 # You should have received a copy of the GNU General Public License
  30 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  31
  32
  33
  34
  35 VPATH = @srcdir@
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  89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
  90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
  91 pkgdatadir = $(datadir)/@PACKAGE@
  92 pkgincludedir = $(includedir)/@PACKAGE@
  93 pkglibdir = $(libdir)/@PACKAGE@
  94 pkglibexecdir = $(libexecdir)/@PACKAGE@
  95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
  96 install_sh_DATA = $(install_sh) -c -m 644
  97 install_sh_PROGRAM = $(install_sh) -c
  98 install_sh_SCRIPT = $(install_sh) -c
  99 INSTALL_HEADER = $(INSTALL_DATA)
 100 transform = $(program_transform_name)
 101 NORMAL_INSTALL = :
 102 PRE_INSTALL = :
 103 POST_INSTALL = :
 104 NORMAL_UNINSTALL = :
 105 PRE_UNINSTALL = :
 106 POST_UNINSTALL = :
 107 build_triplet = @build@
 108 host_triplet = @host@
 109 target_triplet = @target@
 110 check_PROGRAMS = $(am__EXEEXT_7) $(am__EXEEXT_8)
 111 noinst_PROGRAMS = $(am__EXEEXT_9) $(am__EXEEXT_10) $(am__EXEEXT_11) \
 112         $(am__EXEEXT_12) $(am__EXEEXT_13) $(am__EXEEXT_14) \
 113         $(am__EXEEXT_15) $(am__EXEEXT_16) $(am__EXEEXT_17) \
 114         $(am__EXEEXT_18) $(am__EXEEXT_19) $(am__EXEEXT_20) \
 115         $(am__EXEEXT_21) $(am__EXEEXT_22) $(am__EXEEXT_23) \
 116         $(am__EXEEXT_24) $(am__EXEEXT_25) $(am__EXEEXT_26) \
 117         $(am__EXEEXT_27) $(am__EXEEXT_28) $(am__EXEEXT_29) \
 118         $(am__EXEEXT_30) $(am__EXEEXT_31) $(am__EXEEXT_32) \
 119         $(am__EXEEXT_33) $(am__EXEEXT_34) $(am__EXEEXT_35) \
 120         $(am__EXEEXT_36) $(am__EXEEXT_37) $(am__EXEEXT_38) \
 121         $(am__EXEEXT_39) $(am__EXEEXT_40)
 122 EXTRA_PROGRAMS = $(am__EXEEXT_1) testsuite/common/bits-gen$(EXEEXT) \
 123         testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_2) \
 124         $(am__EXEEXT_3) $(am__EXEEXT_4) $(am__EXEEXT_5) \
 125         $(am__EXEEXT_6)
 126 @ENABLE_SIM_TRUE@am__append_1 = \
 127 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/callback.h \
 128 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/sim.h
 129
 130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
 131 @SIM_ENABLE_HW_TRUE@    $(SIM_COMMON_HW_OBJS) \
 132 @SIM_ENABLE_HW_TRUE@    $(SIM_HW_SOCKSER)
 133
 134 TESTS = testsuite/common/bits32m0$(EXEEXT) \
 135         testsuite/common/bits32m31$(EXEEXT) \
 136         testsuite/common/bits64m0$(EXEEXT) \
 137         testsuite/common/bits64m63$(EXEEXT) \
 138         testsuite/common/alu-tst$(EXEEXT)
 139 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_3 = aarch64/libsim.a
 140 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_4 = aarch64/run
 141 @SIM_ENABLE_ARCH_arm_TRUE@am__append_5 = arm/libsim.a
 142 @SIM_ENABLE_ARCH_arm_TRUE@am__append_6 = arm/run
 143 @SIM_ENABLE_ARCH_avr_TRUE@am__append_7 = avr/libsim.a
 144 @SIM_ENABLE_ARCH_avr_TRUE@am__append_8 = avr/run
 145 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_9 = bfin/libsim.a
 146 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_10 = bfin/run
 147 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_11 = bpf/libsim.a
 148 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_12 = bpf/run
 149 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_13 = cr16/libsim.a
 150 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_14 = cr16/run
 151 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_15 = cr16/simops.h
 152 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_16 = cr16/gencode
 153 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_17 = $(cr16_BUILD_OUTPUTS)
 154 @SIM_ENABLE_ARCH_cris_TRUE@am__append_18 = cris/libsim.a
 155 @SIM_ENABLE_ARCH_cris_TRUE@am__append_19 = cris/run
 156 @SIM_ENABLE_ARCH_cris_TRUE@am__append_20 = cris/rvdummy
 157 @SIM_ENABLE_ARCH_cris_TRUE@am__append_21 = \
 158 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv10.h \
 159 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv32.h
 160
 161 @SIM_ENABLE_ARCH_cris_TRUE@am__append_22 = $(cris_BUILD_OUTPUTS)
 162 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_23 = d10v/libsim.a
 163 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_24 = d10v/run
 164 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_25 = d10v/simops.h
 165 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_26 = d10v/gencode
 166 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_27 = $(d10v_BUILD_OUTPUTS)
 167 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_28 = erc32/libsim.a
 168 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_29 = erc32/run erc32/sis
 169 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_30 = sim-%D-install-exec-local
 170 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_31 = sim-erc32-uninstall-local
 171 @SIM_ENABLE_ARCH_examples_TRUE@am__append_32 = example-synacor/libsim.a
 172 @SIM_ENABLE_ARCH_examples_TRUE@am__append_33 = example-synacor/run
 173 @SIM_ENABLE_ARCH_frv_TRUE@am__append_34 = frv/libsim.a
 174 @SIM_ENABLE_ARCH_frv_TRUE@am__append_35 = frv/run
 175 @SIM_ENABLE_ARCH_frv_TRUE@am__append_36 = frv/eng.h
 176 @SIM_ENABLE_ARCH_frv_TRUE@am__append_37 = $(frv_BUILD_OUTPUTS)
 177 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_38 = ft32/libsim.a
 178 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_39 = ft32/run
 179 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_40 = h8300/libsim.a
 180 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_41 = h8300/run
 181 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_42 = iq2000/libsim.a
 182 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_43 = iq2000/run
 183 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_44 = iq2000/eng.h
 184 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_45 = $(iq2000_BUILD_OUTPUTS)
 185 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_46 = lm32/libsim.a
 186 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_47 = lm32/run
 187 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_48 = lm32/eng.h
 188 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_49 = $(lm32_BUILD_OUTPUTS)
 189 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_50 = m32c/libsim.a
 190 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_51 = m32c/run
 191 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_52 = m32c/opc2c
 192 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_53 = \
 193 @SIM_ENABLE_ARCH_m32c_TRUE@     $(m32c_BUILD_OUTPUTS) \
 194 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c.log \
 195 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c.log
 196
 197 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_54 = m32r/libsim.a
 198 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_55 = m32r/run
 199 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_56 = \
 200 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng.h \
 201 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/engx.h \
 202 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng2.h
 203
 204 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_57 = $(m32r_BUILD_OUTPUTS)
 205 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_58 = m68hc11/libsim.a
 206 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_59 = m68hc11/run
 207 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_60 = m68hc11/gencode
 208 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_61 = $(m68hc11_BUILD_OUTPUTS)
 209 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_62 = mcore/libsim.a
 210 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_63 = mcore/run
 211 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_64 = microblaze/libsim.a
 212 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_65 = microblaze/run
 213 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_66 = \
 214 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/support.o \
 215 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/itable.o \
 216 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/semantics.o \
 217 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/idecode.o \
 218 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/icache.o \
 219 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/engine.o \
 220 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/irun.o
 221
 222 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_67 = \
 223 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
 224 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
 225 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
 226 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
 227 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 228 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
 229 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
 230 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
 231 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
 232 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
 233 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
 234 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
 235
 236 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_68 = \
 237 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_OBJ) \
 238 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 240
 241 @SIM_ENABLE_ARCH_mips_TRUE@am__append_69 = mips/libsim.a
 242 @SIM_ENABLE_ARCH_mips_TRUE@am__append_70 = mips/run
 243 @SIM_ENABLE_ARCH_mips_TRUE@am__append_71 = mips/itable.h \
 244 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_MIPS_MULTI_SRC)
 245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_72 = \
 246 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/stamp-gen-mode-single
 248
 249 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_73 = \
 250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
 251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
 252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
 253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
 254
 255 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_74 = \
 256 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_SRC) \
 257 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-igen \
 258 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-run
 259
 260 @SIM_ENABLE_ARCH_mips_TRUE@am__append_75 = $(mips_BUILD_OUTPUTS)
 261 @SIM_ENABLE_ARCH_mips_TRUE@am__append_76 = mips/multi-include.h mips/multi-run.c
 262 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_77 = mn10300/libsim.a
 263 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_78 = mn10300/run
 264 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_79 = \
 265 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
 266 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
 267 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
 268 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
 269 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
 270 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
 271 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h
 272
 273 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_80 = $(mn10300_BUILD_OUTPUTS)
 274 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_81 = moxie/libsim.a
 275 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_82 = moxie/run
 276 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_83 = msp430/libsim.a
 277 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_84 = msp430/run
 278 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_85 = or1k/libsim.a
 279 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_86 = or1k/run
 280 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_87 = or1k/eng.h
 281 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_88 = $(or1k_BUILD_OUTPUTS)
 282 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_89 = common/libcommon.a
 283 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_90 = ppc/run
 284 @SIM_ENABLE_ARCH_pru_TRUE@am__append_91 = pru/libsim.a
 285 @SIM_ENABLE_ARCH_pru_TRUE@am__append_92 = pru/run
 286 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_93 = riscv/libsim.a
 287 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_94 = riscv/run
 288 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_95 = rl78/libsim.a
 289 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_96 = rl78/run
 290 @SIM_ENABLE_ARCH_rx_TRUE@am__append_97 = rx/libsim.a
 291 @SIM_ENABLE_ARCH_rx_TRUE@am__append_98 = rx/run
 292 @SIM_ENABLE_ARCH_sh_TRUE@am__append_99 = sh/libsim.a
 293 @SIM_ENABLE_ARCH_sh_TRUE@am__append_100 = sh/run
 294 @SIM_ENABLE_ARCH_sh_TRUE@am__append_101 = \
 295 @SIM_ENABLE_ARCH_sh_TRUE@       sh/code.c \
 296 @SIM_ENABLE_ARCH_sh_TRUE@       sh/ppi.c
 297
 298 @SIM_ENABLE_ARCH_sh_TRUE@am__append_102 = sh/gencode
 299 @SIM_ENABLE_ARCH_sh_TRUE@am__append_103 = $(sh_BUILD_OUTPUTS)
 300 @SIM_ENABLE_ARCH_v850_TRUE@am__append_104 = v850/libsim.a
 301 @SIM_ENABLE_ARCH_v850_TRUE@am__append_105 = v850/run
 302 @SIM_ENABLE_ARCH_v850_TRUE@am__append_106 = \
 303 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
 304 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
 305 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
 306 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
 307 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
 308 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
 309 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h
 310
 311 @SIM_ENABLE_ARCH_v850_TRUE@am__append_107 = $(v850_BUILD_OUTPUTS)
 312 subdir = .
 313 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 314 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
 315         $(top_srcdir)/../config/depstand.m4 \
 316         $(top_srcdir)/../config/lead-dot.m4 \
 317         $(top_srcdir)/../config/override.m4 \
 318         $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
 319         $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
 320         $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
 321         $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
 322         $(top_srcdir)/m4/sim_ac_option_assert.m4 \
 323         $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
 324         $(top_srcdir)/m4/sim_ac_option_debug.m4 \
 325         $(top_srcdir)/m4/sim_ac_option_endian.m4 \
 326         $(top_srcdir)/m4/sim_ac_option_environment.m4 \
 327         $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
 328         $(top_srcdir)/m4/sim_ac_option_inline.m4 \
 329         $(top_srcdir)/m4/sim_ac_option_profile.m4 \
 330         $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
 331         $(top_srcdir)/m4/sim_ac_option_scache.m4 \
 332         $(top_srcdir)/m4/sim_ac_option_smp.m4 \
 333         $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
 334         $(top_srcdir)/m4/sim_ac_option_trace.m4 \
 335         $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
 336         $(top_srcdir)/m4/sim_ac_platform.m4 \
 337         $(top_srcdir)/m4/sim_ac_toolchain.m4 \
 338         $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
 339         $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
 340         $(top_srcdir)/configure.ac
 341 am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
 342         $(ACLOCAL_M4)
 343 DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
 344         $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
 345 am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
 346  configure.lineno config.status.lineno
 347 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
 348 CONFIG_HEADER = config.h
 349 CONFIG_CLEAN_FILES = aarch64/.gdbinit arm/.gdbinit avr/.gdbinit \
 350         bfin/.gdbinit bpf/.gdbinit cr16/.gdbinit cris/.gdbinit \
 351         d10v/.gdbinit frv/.gdbinit ft32/.gdbinit h8300/.gdbinit \
 352         iq2000/.gdbinit lm32/.gdbinit m32c/.gdbinit m32r/.gdbinit \
 353         m68hc11/.gdbinit mcore/.gdbinit microblaze/.gdbinit \
 354         mips/.gdbinit mn10300/.gdbinit moxie/.gdbinit msp430/.gdbinit \
 355         or1k/.gdbinit ppc/.gdbinit pru/.gdbinit riscv/.gdbinit \
 356         rl78/.gdbinit rx/.gdbinit sh/.gdbinit erc32/.gdbinit \
 357         v850/.gdbinit example-synacor/.gdbinit arch-subdir.mk .gdbinit
 358 CONFIG_CLEAN_VPATH_FILES =
 359 LIBRARIES = $(noinst_LIBRARIES)
 360 ARFLAGS = cru
 361 AM_V_AR = $(am__v_AR_@AM_V@)
 362 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
 363 am__v_AR_0 = @echo "  AR      " $@;
 364 am__v_AR_1 =
 365 aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
 366 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES =  \
 367 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 368 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
 369 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 370 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
 371 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
 372 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
 373 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
 374 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
 375 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
 376 am__dirstamp = $(am__leading_dot)dirstamp
 377 am__objects_1 = common/callback.$(OBJEXT) common/portability.$(OBJEXT) \
 378         common/sim-load.$(OBJEXT) common/sim-signal.$(OBJEXT) \
 379         common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
 380         common/target-newlib-open.$(OBJEXT) \
 381         common/target-newlib-signal.$(OBJEXT) \
 382         common/target-newlib-syscall.$(OBJEXT) \
 383         common/version.$(OBJEXT)
 384 @SIM_ENABLE_ARCH_aarch64_TRUE@am_aarch64_libsim_a_OBJECTS =  \
 385 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(am__objects_1)
 386 @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_OBJECTS =  \
 387 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.$(OBJEXT)
 388 aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS) \
 389         $(nodist_aarch64_libsim_a_OBJECTS)
 390 arm_libsim_a_AR = $(AR) $(ARFLAGS)
 391 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
 392 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 393 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
 394 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 395 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
 396 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o arm/armemu32.o \
 397 @SIM_ENABLE_ARCH_arm_TRUE@      arm/arminit.o arm/armos.o \
 398 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armsupp.o arm/armvirt.o \
 399 @SIM_ENABLE_ARCH_arm_TRUE@      arm/thumbemu.o arm/armcopro.o \
 400 @SIM_ENABLE_ARCH_arm_TRUE@      arm/maverick.o arm/iwmmxt.o
 401 @SIM_ENABLE_ARCH_arm_TRUE@am_arm_libsim_a_OBJECTS = $(am__objects_1)
 402 @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_OBJECTS =  \
 403 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.$(OBJEXT)
 404 arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS) \
 405         $(nodist_arm_libsim_a_OBJECTS)
 406 avr_libsim_a_AR = $(AR) $(ARFLAGS)
 407 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
 408 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 409 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
 410 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 411 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
 412 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
 413 @SIM_ENABLE_ARCH_avr_TRUE@am_avr_libsim_a_OBJECTS = $(am__objects_1)
 414 @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_OBJECTS =  \
 415 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.$(OBJEXT)
 416 avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS) \
 417         $(nodist_avr_libsim_a_OBJECTS)
 418 bfin_libsim_a_AR = $(AR) $(ARFLAGS)
 419 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
 420 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
 421 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 422 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
 423 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
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 425 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o bfin/devices.o \
 426 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o bfin/interp.o \
 427 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o bfin/sim-resume.o
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 429 @SIM_ENABLE_ARCH_bfin_TRUE@     $(am__objects_1)
 430 @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_OBJECTS =  \
 431 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.$(OBJEXT)
 432 bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS) \
 433         $(nodist_bfin_libsim_a_OBJECTS)
 434 bpf_libsim_a_AR = $(AR) $(ARFLAGS)
 435 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = bpf/bpf-sim.o \
 436 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst \
 437 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
 438 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst \
 439 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
 440 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-resume.o
 441 @SIM_ENABLE_ARCH_bpf_TRUE@am_bpf_libsim_a_OBJECTS = $(am__objects_1)
 442 @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_OBJECTS =  \
 443 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.$(OBJEXT)
 444 bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS) \
 445         $(nodist_bpf_libsim_a_OBJECTS)
 446 common_libcommon_a_AR = $(AR) $(ARFLAGS)
 447 common_libcommon_a_LIBADD =
 448 am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
 449         common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
 450         common/sim-signal.$(OBJEXT) common/syscall.$(OBJEXT) \
 451         common/target-newlib-errno.$(OBJEXT) \
 452         common/target-newlib-open.$(OBJEXT) \
 453         common/target-newlib-signal.$(OBJEXT) \
 454         common/target-newlib-syscall.$(OBJEXT) \
 455         common/version.$(OBJEXT)
 456 common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
 457 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
 458 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES = $(patsubst \
 459 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
 460 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst \
 461 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
 462 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o cr16/sim-resume.o \
 463 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o cr16/table.o
 464 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_libsim_a_OBJECTS =  \
 465 @SIM_ENABLE_ARCH_cr16_TRUE@     $(am__objects_1)
 466 @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_OBJECTS =  \
 467 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.$(OBJEXT)
 468 cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS) \
 469         $(nodist_cr16_libsim_a_OBJECTS)
 470 cris_libsim_a_AR = $(AR) $(ARFLAGS)
 471 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES = $(patsubst \
 472 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
 473 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 474 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
 475 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 476 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
 477 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o cris/cgen-scache.o \
 478 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o cris/cgen-utils.o \
 479 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o cris/crisv10f.o \
 480 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o cris/decodev10.o \
 481 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o cris/mloopv10f.o \
 482 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o cris/cpuv32.o \
 483 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o cris/modelv32.o \
 484 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o cris/sim-if.o \
 485 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
 486 @SIM_ENABLE_ARCH_cris_TRUE@am_cris_libsim_a_OBJECTS =  \
 487 @SIM_ENABLE_ARCH_cris_TRUE@     $(am__objects_1)
 488 @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_OBJECTS =  \
 489 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.$(OBJEXT)
 490 cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS) \
 491         $(nodist_cris_libsim_a_OBJECTS)
 492 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
 493 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES = d10v/interp.o \
 494 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 495 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
 496 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 497 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
 498 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o d10v/sim-resume.o \
 499 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o d10v/table.o
 500 @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_libsim_a_OBJECTS =  \
 501 @SIM_ENABLE_ARCH_d10v_TRUE@     $(am__objects_1)
 502 @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_OBJECTS =  \
 503 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.$(OBJEXT)
 504 d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS) \
 505         $(nodist_d10v_libsim_a_OBJECTS)
 506 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
 507 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES =  \
 508 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o erc32/exec.o \
 509 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o erc32/func.o \
 510 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o erc32/interf.o
 511 @SIM_ENABLE_ARCH_erc32_TRUE@am_erc32_libsim_a_OBJECTS =  \
 512 @SIM_ENABLE_ARCH_erc32_TRUE@    $(am__objects_1)
 513 @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_OBJECTS =  \
 514 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.$(OBJEXT)
 515 erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS) \
 516         $(nodist_erc32_libsim_a_OBJECTS)
 517 example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
 518 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES =  \
 519 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 520 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
 521 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 522 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
 523 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
 524 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
 525 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
 526 @SIM_ENABLE_ARCH_examples_TRUE@am_example_synacor_libsim_a_OBJECTS =  \
 527 @SIM_ENABLE_ARCH_examples_TRUE@ $(am__objects_1)
 528 @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_OBJECTS = example-synacor/modules.$(OBJEXT)
 529 example_synacor_libsim_a_OBJECTS =  \
 530         $(am_example_synacor_libsim_a_OBJECTS) \
 531         $(nodist_example_synacor_libsim_a_OBJECTS)
 532 frv_libsim_a_AR = $(AR) $(ARFLAGS)
 533 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES = $(patsubst \
 534 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
 535 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst \
 536 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
 537 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o frv/cgen-fpu.o \
 538 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o frv/cgen-scache.o \
 539 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o frv/cgen-utils.o \
 540 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o frv/cgen-par.o frv/cpu.o \
 541 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o frv/frv.o frv/mloop.o \
 542 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o frv/sem.o frv/cache.o \
 543 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o frv/memory.o \
 544 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o frv/pipeline.o \
 545 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o frv/profile-fr400.o \
 546 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
 547 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
 548 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o frv/registers.o \
 549 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o frv/sim-if.o frv/traps.o
 550 @SIM_ENABLE_ARCH_frv_TRUE@am_frv_libsim_a_OBJECTS = $(am__objects_1)
 551 @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_OBJECTS =  \
 552 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.$(OBJEXT)
 553 frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS) \
 554         $(nodist_frv_libsim_a_OBJECTS)
 555 ft32_libsim_a_AR = $(AR) $(ARFLAGS)
 556 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES = $(patsubst \
 557 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
 558 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst \
 559 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
 560 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o ft32/sim-resume.o
 561 @SIM_ENABLE_ARCH_ft32_TRUE@am_ft32_libsim_a_OBJECTS =  \
 562 @SIM_ENABLE_ARCH_ft32_TRUE@     $(am__objects_1)
 563 @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_OBJECTS =  \
 564 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.$(OBJEXT)
 565 ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS) \
 566         $(nodist_ft32_libsim_a_OBJECTS)
 567 h8300_libsim_a_AR = $(AR) $(ARFLAGS)
 568 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES =  \
 569 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o $(patsubst \
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 571 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst \
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 573 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
 574 @SIM_ENABLE_ARCH_h8300_TRUE@am_h8300_libsim_a_OBJECTS =  \
 575 @SIM_ENABLE_ARCH_h8300_TRUE@    $(am__objects_1)
 576 @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_OBJECTS =  \
 577 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.$(OBJEXT)
 578 h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS) \
 579         $(nodist_h8300_libsim_a_OBJECTS)
 580 igen_libigen_a_AR = $(AR) $(ARFLAGS)
 581 igen_libigen_a_LIBADD =
 582 am_igen_libigen_a_OBJECTS = igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
 583         igen/misc.$(OBJEXT) igen/filter_host.$(OBJEXT) \
 584         igen/ld-decode.$(OBJEXT) igen/ld-cache.$(OBJEXT) \
 585         igen/filter.$(OBJEXT) igen/ld-insn.$(OBJEXT) \
 586         igen/gen-model.$(OBJEXT) igen/gen-itable.$(OBJEXT) \
 587         igen/gen-icache.$(OBJEXT) igen/gen-semantics.$(OBJEXT) \
 588         igen/gen-idecode.$(OBJEXT) igen/gen-support.$(OBJEXT) \
 589         igen/gen-engine.$(OBJEXT) igen/gen.$(OBJEXT)
 590 igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
 591 iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
 592 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES =  \
 593 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 594 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
 595 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst \
 596 @SIM_ENABLE_ARCH_iq2000_TRUE@   %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
 597 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
 598 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
 599 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
 600 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o iq2000/arch.o \
 601 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o iq2000/decode.o \
 602 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o iq2000/sem.o \
 603 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o iq2000/model.o \
 604 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
 605 @SIM_ENABLE_ARCH_iq2000_TRUE@am_iq2000_libsim_a_OBJECTS =  \
 606 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(am__objects_1)
 607 @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_OBJECTS =  \
 608 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.$(OBJEXT)
 609 iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS) \
 610         $(nodist_iq2000_libsim_a_OBJECTS)
 611 lm32_libsim_a_AR = $(AR) $(ARFLAGS)
 612 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = $(patsubst \
 613 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
 614 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 615 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
 616 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst \
 617 @SIM_ENABLE_ARCH_lm32_TRUE@     %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
 618 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o lm32/cgen-scache.o \
 619 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o lm32/cgen-utils.o \
 620 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o lm32/cpu.o \
 621 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o lm32/sem.o \
 622 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o lm32/model.o \
 623 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o lm32/sim-if.o \
 624 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o lm32/user.o
 625 @SIM_ENABLE_ARCH_lm32_TRUE@am_lm32_libsim_a_OBJECTS =  \
 626 @SIM_ENABLE_ARCH_lm32_TRUE@     $(am__objects_1)
 627 @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_OBJECTS =  \
 628 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.$(OBJEXT)
 629 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS) \
 630         $(nodist_lm32_libsim_a_OBJECTS)
 631 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
 632 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES = m32c/gdb-if.o \
 633 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o m32c/load.o m32c/m32c.o \
 634 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o m32c/misc.o m32c/r8c.o \
 635 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o m32c/srcdest.o \
 636 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o m32c/trace.o
 637 @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_libsim_a_OBJECTS =  \
 638 @SIM_ENABLE_ARCH_m32c_TRUE@     $(am__objects_1)
 639 @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_OBJECTS =  \
 640 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.$(OBJEXT)
 641 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS) \
 642         $(nodist_m32c_libsim_a_OBJECTS)
 643 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
 644 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = $(patsubst \
 645 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
 646 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 647 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
 648 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst \
 649 @SIM_ENABLE_ARCH_m32r_TRUE@     %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
 650 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o m32r/cgen-scache.o \
 651 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o m32r/cgen-utils.o \
 652 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o m32r/m32r.o m32r/cpu.o \
 653 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o m32r/sem.o \
 654 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o m32r/mloop.o \
 655 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o m32r/cpux.o \
 656 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o m32r/modelx.o \
 657 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o m32r/m32r2.o \
 658 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o m32r/decode2.o \
 659 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o m32r/mloop2.o \
 660 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o m32r/traps.o
 661 @SIM_ENABLE_ARCH_m32r_TRUE@am_m32r_libsim_a_OBJECTS =  \
 662 @SIM_ENABLE_ARCH_m32r_TRUE@     $(am__objects_1)
 663 @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_OBJECTS =  \
 664 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.$(OBJEXT)
 665 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS) \
 666         $(nodist_m32r_libsim_a_OBJECTS)
 667 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
 668 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES =  \
 669 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
 670 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
 671 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
 672 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
 673 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
 674 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o $(patsubst \
 675 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
 676 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 677 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
 678 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst \
 679 @SIM_ENABLE_ARCH_m68hc11_TRUE@  %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
 680 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
 681 @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_libsim_a_OBJECTS =  \
 682 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(am__objects_1)
 683 @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_OBJECTS =  \
 684 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.$(OBJEXT)
 685 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS) \
 686         $(nodist_m68hc11_libsim_a_OBJECTS)
 687 mcore_libsim_a_AR = $(AR) $(ARFLAGS)
 688 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES =  \
 689 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o $(patsubst \
 690 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
 691 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst \
 692 @SIM_ENABLE_ARCH_mcore_TRUE@    %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
 693 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
 694 @SIM_ENABLE_ARCH_mcore_TRUE@am_mcore_libsim_a_OBJECTS =  \
 695 @SIM_ENABLE_ARCH_mcore_TRUE@    $(am__objects_1)
 696 @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_OBJECTS =  \
 697 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.$(OBJEXT)
 698 mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS) \
 699         $(nodist_mcore_libsim_a_OBJECTS)
 700 microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
 701 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES =  \
 702 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
 703 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 704 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
 705 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst \
 706 @SIM_ENABLE_ARCH_microblaze_TRUE@       %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
 707 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
 708 @SIM_ENABLE_ARCH_microblaze_TRUE@am_microblaze_libsim_a_OBJECTS =  \
 709 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(am__objects_1)
 710 @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_OBJECTS =  \
 711 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.$(OBJEXT)
 712 microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS) \
 713         $(nodist_microblaze_libsim_a_OBJECTS)
 714 mips_libsim_a_AR = $(AR) $(ARFLAGS)
 715 am__DEPENDENCIES_1 =
 716 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
 717 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/itable.o \
 718 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/multi-run.o
 719 @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_66) \
 720 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_67) \
 721 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_2)
 722 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = mips/interp.o \
 723 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__DEPENDENCIES_3) $(patsubst \
 724 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
 725 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 726 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
 727 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst \
 728 @SIM_ENABLE_ARCH_mips_TRUE@     %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
 729 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o mips/dsp.o mips/mdmx.o \
 730 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o mips/sim-resume.o
 731 @SIM_ENABLE_ARCH_mips_TRUE@am_mips_libsim_a_OBJECTS =  \
 732 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__objects_1)
 733 @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_OBJECTS =  \
 734 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.$(OBJEXT)
 735 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS) \
 736         $(nodist_mips_libsim_a_OBJECTS)
 737 mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
 738 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =  \
 739 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
 740 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
 741 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
 742 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
 743 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o mn10300/irun.o \
 744 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o $(patsubst \
 745 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
 746 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 747 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
 748 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst \
 749 @SIM_ENABLE_ARCH_mn10300_TRUE@  %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
 750 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
 751 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
 752 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
 753 @SIM_ENABLE_ARCH_mn10300_TRUE@am_mn10300_libsim_a_OBJECTS =  \
 754 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(am__objects_1)
 755 @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_OBJECTS =  \
 756 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.$(OBJEXT)
 757 mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS) \
 758         $(nodist_mn10300_libsim_a_OBJECTS)
 759 moxie_libsim_a_AR = $(AR) $(ARFLAGS)
 760 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES = $(patsubst \
 761 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
 762 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst \
 763 @SIM_ENABLE_ARCH_moxie_TRUE@    %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
 764 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o moxie/sim-resume.o
 765 @SIM_ENABLE_ARCH_moxie_TRUE@am_moxie_libsim_a_OBJECTS =  \
 766 @SIM_ENABLE_ARCH_moxie_TRUE@    $(am__objects_1)
 767 @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_OBJECTS =  \
 768 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.$(OBJEXT)
 769 moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS) \
 770         $(nodist_moxie_libsim_a_OBJECTS)
 771 msp430_libsim_a_AR = $(AR) $(ARFLAGS)
 772 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES =  \
 773 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 774 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
 775 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst \
 776 @SIM_ENABLE_ARCH_msp430_TRUE@   %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
 777 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
 778 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
 779 @SIM_ENABLE_ARCH_msp430_TRUE@am_msp430_libsim_a_OBJECTS =  \
 780 @SIM_ENABLE_ARCH_msp430_TRUE@   $(am__objects_1)
 781 @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_OBJECTS =  \
 782 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.$(OBJEXT)
 783 msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS) \
 784         $(nodist_msp430_libsim_a_OBJECTS)
 785 or1k_libsim_a_AR = $(AR) $(ARFLAGS)
 786 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES = $(patsubst \
 787 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
 788 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst \
 789 @SIM_ENABLE_ARCH_or1k_TRUE@     %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
 790 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o or1k/cgen-fpu.o \
 791 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o or1k/cgen-scache.o \
 792 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o or1k/cgen-utils.o \
 793 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o or1k/cpu.o \
 794 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o or1k/mloop.o \
 795 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o or1k/sem.o or1k/or1k.o \
 796 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o or1k/traps.o
 797 @SIM_ENABLE_ARCH_or1k_TRUE@am_or1k_libsim_a_OBJECTS =  \
 798 @SIM_ENABLE_ARCH_or1k_TRUE@     $(am__objects_1)
 799 @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_OBJECTS =  \
 800 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.$(OBJEXT)
 801 or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS) \
 802         $(nodist_or1k_libsim_a_OBJECTS)
 803 pru_libsim_a_AR = $(AR) $(ARFLAGS)
 804 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES = $(patsubst \
 805 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
 806 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst \
 807 @SIM_ENABLE_ARCH_pru_TRUE@      %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
 808 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o pru/sim-resume.o
 809 @SIM_ENABLE_ARCH_pru_TRUE@am_pru_libsim_a_OBJECTS = $(am__objects_1)
 810 @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_OBJECTS =  \
 811 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.$(OBJEXT)
 812 pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS) \
 813         $(nodist_pru_libsim_a_OBJECTS)
 814 riscv_libsim_a_AR = $(AR) $(ARFLAGS)
 815 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES = $(patsubst \
 816 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
 817 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst \
 818 @SIM_ENABLE_ARCH_riscv_TRUE@    %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
 819 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o riscv/machs.o \
 820 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
 821 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
 822 @SIM_ENABLE_ARCH_riscv_TRUE@am_riscv_libsim_a_OBJECTS =  \
 823 @SIM_ENABLE_ARCH_riscv_TRUE@    $(am__objects_1)
 824 @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_OBJECTS =  \
 825 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.$(OBJEXT)
 826 riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS) \
 827         $(nodist_riscv_libsim_a_OBJECTS)
 828 rl78_libsim_a_AR = $(AR) $(ARFLAGS)
 829 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES = rl78/load.o \
 830 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o rl78/cpu.o rl78/rl78.o \
 831 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o rl78/trace.o
 832 @SIM_ENABLE_ARCH_rl78_TRUE@am_rl78_libsim_a_OBJECTS =  \
 833 @SIM_ENABLE_ARCH_rl78_TRUE@     $(am__objects_1)
 834 @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_OBJECTS =  \
 835 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.$(OBJEXT)
 836 rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS) \
 837         $(nodist_rl78_libsim_a_OBJECTS)
 838 rx_libsim_a_AR = $(AR) $(ARFLAGS)
 839 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES = rx/fpu.o rx/load.o \
 840 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o rx/misc.o rx/reg.o rx/rx.o \
 841 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o rx/trace.o rx/gdb-if.o \
 842 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o
 843 @SIM_ENABLE_ARCH_rx_TRUE@am_rx_libsim_a_OBJECTS = $(am__objects_1)
 844 @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_OBJECTS =  \
 845 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.$(OBJEXT)
 846 rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS) \
 847         $(nodist_rx_libsim_a_OBJECTS)
 848 sh_libsim_a_AR = $(AR) $(ARFLAGS)
 849 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES = sh/interp.o \
 850 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 851 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
 852 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst \
 853 @SIM_ENABLE_ARCH_sh_TRUE@       %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
 854 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
 855 @SIM_ENABLE_ARCH_sh_TRUE@am_sh_libsim_a_OBJECTS = $(am__objects_1)
 856 @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_OBJECTS =  \
 857 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.$(OBJEXT)
 858 sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS) \
 859         $(nodist_sh_libsim_a_OBJECTS)
 860 v850_libsim_a_AR = $(AR) $(ARFLAGS)
 861 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES = $(patsubst \
 862 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
 863 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst \
 864 @SIM_ENABLE_ARCH_v850_TRUE@     %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
 865 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o v850/interp.o \
 866 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o v850/semantics.o \
 867 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o v850/icache.o \
 868 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o v850/irun.o \
 869 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o v850/sim-resume.o
 870 @SIM_ENABLE_ARCH_v850_TRUE@am_v850_libsim_a_OBJECTS =  \
 871 @SIM_ENABLE_ARCH_v850_TRUE@     $(am__objects_1)
 872 @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_OBJECTS =  \
 873 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.$(OBJEXT)
 874 v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS) \
 875         $(nodist_v850_libsim_a_OBJECTS)
 876 am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) igen/gen$(EXEEXT) \
 877         igen/ld-cache$(EXEEXT) igen/ld-decode$(EXEEXT) \
 878         igen/ld-insn$(EXEEXT) igen/table$(EXEEXT)
 879 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_2 = cr16/gencode$(EXEEXT)
 880 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_3 = d10v/gencode$(EXEEXT)
 881 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_4 = m32c/opc2c$(EXEEXT)
 882 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_5 = m68hc11/gencode$(EXEEXT)
 883 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_6 = sh/gencode$(EXEEXT)
 884 am__EXEEXT_7 = testsuite/common/bits32m0$(EXEEXT) \
 885         testsuite/common/bits32m31$(EXEEXT) \
 886         testsuite/common/bits64m0$(EXEEXT) \
 887         testsuite/common/bits64m63$(EXEEXT) \
 888         testsuite/common/alu-tst$(EXEEXT)
 889 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_8 = cris/rvdummy$(EXEEXT)
 890 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_9 = aarch64/run$(EXEEXT)
 891 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_10 = arm/run$(EXEEXT)
 892 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_11 = avr/run$(EXEEXT)
 893 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_12 = bfin/run$(EXEEXT)
 894 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_13 = bpf/run$(EXEEXT)
 895 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_14 = cr16/run$(EXEEXT)
 896 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_15 = cris/run$(EXEEXT)
 897 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_16 = d10v/run$(EXEEXT)
 898 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_17 = erc32/run$(EXEEXT) \
 899 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis$(EXEEXT)
 900 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_18 =  \
 901 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
 902 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_19 = frv/run$(EXEEXT)
 903 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_20 = ft32/run$(EXEEXT)
 904 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_21 = h8300/run$(EXEEXT)
 905 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_22 = iq2000/run$(EXEEXT)
 906 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_23 = lm32/run$(EXEEXT)
 907 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_24 = m32c/run$(EXEEXT)
 908 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_25 = m32r/run$(EXEEXT)
 909 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_26 = m68hc11/run$(EXEEXT)
 910 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_27 = mcore/run$(EXEEXT)
 911 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_28 =  \
 912 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/run$(EXEEXT)
 913 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_29 = mips/run$(EXEEXT)
 914 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_30 = mn10300/run$(EXEEXT)
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1223         $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
1224         $(erc32_run_SOURCES) erc32/sis.c \
1225         $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
1226         $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
1227         $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
1228         $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \
1229         $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \
1230         $(igen_table_SOURCES) $(iq2000_run_SOURCES) \
1231         $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \
1232         $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \
1233         $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \
1234         $(microblaze_run_SOURCES) $(mips_run_SOURCES) \
1235         $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \
1236         $(msp430_run_SOURCES) $(or1k_run_SOURCES) $(ppc_run_SOURCES) \
1237         $(pru_run_SOURCES) $(riscv_run_SOURCES) $(rl78_run_SOURCES) \
1238         $(rx_run_SOURCES) $(sh_gencode_SOURCES) $(sh_run_SOURCES) \
1239         testsuite/common/alu-tst.c testsuite/common/bits-gen.c \
1240         testsuite/common/bits32m0.c testsuite/common/bits32m31.c \
1241         testsuite/common/bits64m0.c testsuite/common/bits64m63.c \
1242         testsuite/common/fpu-tst.c $(v850_run_SOURCES)
1243 RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
1244         ctags-recursive dvi-recursive html-recursive info-recursive \
1245         install-data-recursive install-dvi-recursive \
1246         install-exec-recursive install-html-recursive \
1247         install-info-recursive install-pdf-recursive \
1248         install-ps-recursive install-recursive installcheck-recursive \
1249         installdirs-recursive pdf-recursive ps-recursive \
1250         tags-recursive uninstall-recursive
1251 am__can_run_installinfo = \
1252   case $$AM_UPDATE_INFO_DIR in \
1253     n|no|NO) false;; \
1254     *) (install-info --version) >/dev/null 2>&1;; \
1255   esac
1256 am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
1257 am__vpath_adj = case $$p in \
1258     $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
1259     *) f=$$p;; \
1260   esac;
1261 am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
1262 am__install_max = 40
1263 am__nobase_strip_setup = \
1264   srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
1265 am__nobase_strip = \
1266   for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
1267 am__nobase_list = $(am__nobase_strip_setup); \
1268   for p in $$list; do echo "$$p $$p"; done | \
1269   sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
1270   $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
1271     if (++n[$$2] == $(am__install_max)) \
1272       { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1273     END { for (dir in files) print dir, files[dir] }'
1274 am__base_list = \
1275   sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1276   sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
1277 am__uninstall_files_from_dir = { \
1278   test -z "$$files" \
1279     || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
1280     || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
1281          $(am__cd) "$$dir" && rm -f $$files; }; \
1282   }
1283 am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1284         "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1285         "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1286         "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1287 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1288         $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1289 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1290         $(srcroot)/include/sim/sim.h
1291 HEADERS = $(pkginclude_HEADERS)
1292 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1293   distclean-recursive maintainer-clean-recursive
1294 am__recursive_targets = \
1295   $(RECURSIVE_TARGETS) \
1296   $(RECURSIVE_CLEAN_TARGETS) \
1297   $(am__extra_recursive_targets)
1298 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1299         cscope check recheck
1300 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1301         $(LISP)config.h.in
1302 # Read a list of newline-separated strings from the standard input,
1303 # and print each of them once, without duplicates.  Input order is
1304 # *not* preserved.
1305 am__uniquify_input = $(AWK) '\
1306   BEGIN { nonempty = 0; } \
1307   { items[$$0] = 1; nonempty = 1; } \
1308   END { if (nonempty) { for (i in items) print i; }; } \
1309 '
1310 # Make sure the list of sources is unique.  This is necessary because,
1311 # e.g., the same source file might be shared among _SOURCES variables
1312 # for different programs/libraries.
1313 am__define_uniq_tagged_files = \
1314   list='$(am__tagged_files)'; \
1315   unique=`for i in $$list; do \
1316     if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1317   done | $(am__uniquify_input)`
1318 ETAGS = etags
1319 CTAGS = ctags
1320 CSCOPE = cscope
1321 DEJATOOL = $(PACKAGE)
1322 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1323 EXPECT = expect
1324 RUNTEST = runtest
1325 am__tty_colors_dummy = \
1326   mgn= red= grn= lgn= blu= brg= std=; \
1327   am__color_tests=no
1328 am__tty_colors = { \
1329   $(am__tty_colors_dummy); \
1330   if test "X$(AM_COLOR_TESTS)" = Xno; then \
1331     am__color_tests=no; \
1332   elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1333     am__color_tests=yes; \
1334   elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1335     am__color_tests=yes; \
1336   fi; \
1337   if test $$am__color_tests = yes; then \
1338     red='\e[0;31m'; \
1339     grn='\e[0;32m'; \
1340     lgn='\e[1;32m'; \
1341     blu='\e[1;34m'; \
1342     mgn='\e[0;35m'; \
1343     brg='\e[1m'; \
1344     std='\e[m'; \
1345   fi; \
1346 }
1347 am__recheck_rx = ^[     ]*:recheck:[    ]*
1348 am__global_test_result_rx = ^[  ]*:global-test-result:[         ]*
1349 am__copy_in_global_log_rx = ^[  ]*:copy-in-global-log:[         ]*
1350 # A command that, given a newline-separated list of test names on the
1351 # standard input, print the name of the tests that are to be re-run
1352 # upon "make recheck".
1353 am__list_recheck_tests = $(AWK) '{ \
1354   recheck = 1; \
1355   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1356     { \
1357       if (rc < 0) \
1358         { \
1359           if ((getline line2 < ($$0 ".log")) < 0) \
1360             recheck = 0; \
1361           break; \
1362         } \
1363       else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1364         { \
1365           recheck = 0; \
1366           break; \
1367         } \
1368       else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1369         { \
1370           break; \
1371         } \
1372     }; \
1373   if (recheck) \
1374     print $$0; \
1375   close ($$0 ".trs"); \
1376   close ($$0 ".log"); \
1377 }'
1378 # A command that, given a newline-separated list of test names on the
1379 # standard input, create the global log from their .trs and .log files.
1380 am__create_global_log = $(AWK) ' \
1381 function fatal(msg) \
1382 { \
1383   print "fatal: making $@: " msg | "cat >&2"; \
1384   exit 1; \
1385 } \
1386 function rst_section(header) \
1387 { \
1388   print header; \
1389   len = length(header); \
1390   for (i = 1; i <= len; i = i + 1) \
1391     printf "="; \
1392   printf "\n\n"; \
1393 } \
1394 { \
1395   copy_in_global_log = 1; \
1396   global_test_result = "RUN"; \
1397   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1398     { \
1399       if (rc < 0) \
1400          fatal("failed to read from " $$0 ".trs"); \
1401       if (line ~ /$(am__global_test_result_rx)/) \
1402         { \
1403           sub("$(am__global_test_result_rx)", "", line); \
1404           sub("[        ]*$$", "", line); \
1405           global_test_result = line; \
1406         } \
1407       else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1408         copy_in_global_log = 0; \
1409     }; \
1410   if (copy_in_global_log) \
1411     { \
1412       rst_section(global_test_result ": " $$0); \
1413       while ((rc = (getline line < ($$0 ".log"))) != 0) \
1414       { \
1415         if (rc < 0) \
1416           fatal("failed to read from " $$0 ".log"); \
1417         print line; \
1418       }; \
1419       printf "\n"; \
1420     }; \
1421   close ($$0 ".trs"); \
1422   close ($$0 ".log"); \
1423 }'
1424 # Restructured Text title.
1425 am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1426 # Solaris 10 'make', and several other traditional 'make' implementations,
1427 # pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
1428 # by disabling -e (using the XSI extension "set +e") if it's set.
1429 am__sh_e_setup = case $$- in *e*) set +e;; esac
1430 # Default flags passed to test drivers.
1431 am__common_driver_flags = \
1432   --color-tests "$$am__color_tests" \
1433   --enable-hard-errors "$$am__enable_hard_errors" \
1434   --expect-failure "$$am__expect_failure"
1435 # To be inserted before the command running the test.  Creates the
1436 # directory for the log if needed.  Stores in $dir the directory
1437 # containing $f, in $tst the test, in $log the log.  Executes the
1438 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1439 # passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
1440 # will run the test scripts (or their associated LOG_COMPILER, if
1441 # thy have one).
1442 am__check_pre = \
1443 $(am__sh_e_setup);                                      \
1444 $(am__vpath_adj_setup) $(am__vpath_adj)                 \
1445 $(am__tty_colors);                                      \
1446 srcdir=$(srcdir); export srcdir;                        \
1447 case "$@" in                                            \
1448   */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;    \
1449     *) am__odir=.;;                                     \
1450 esac;                                                   \
1451 test "x$$am__odir" = x"." || test -d "$$am__odir"       \
1452   || $(MKDIR_P) "$$am__odir" || exit $$?;               \
1453 if test -f "./$$f"; then dir=./;                        \
1454 elif test -f "$$f"; then dir=;                          \
1455 else dir="$(srcdir)/"; fi;                              \
1456 tst=$$dir$$f; log='$@';                                 \
1457 if test -n '$(DISABLE_HARD_ERRORS)'; then               \
1458   am__enable_hard_errors=no;                            \
1459 else                                                    \
1460   am__enable_hard_errors=yes;                           \
1461 fi;                                                     \
1462 case " $(XFAIL_TESTS) " in                              \
1463   *[\ \ ]$$f[\ \        ]* | *[\ \      ]$$dir$$f[\ \   ]*) \
1464     am__expect_failure=yes;;                            \
1465   *)                                                    \
1466     am__expect_failure=no;;                             \
1467 esac;                                                   \
1468 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1469 # A shell command to get the names of the tests scripts with any registered
1470 # extension removed (i.e., equivalently, the names of the test logs, with
1471 # the '.log' extension removed).  The result is saved in the shell variable
1472 # '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
1473 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1474 # since that might cause problem with VPATH rewrites for suffix-less tests.
1475 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1476 am__set_TESTS_bases = \
1477   bases='$(TEST_LOGS)'; \
1478   bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1479   bases=`echo $$bases`
1480 RECHECK_LOGS = $(TEST_LOGS)
1481 TEST_SUITE_LOG = test-suite.log
1482 TEST_EXTENSIONS = @EXEEXT@ .test
1483 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1484 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1485 am__set_b = \
1486   case '$@' in \
1487     */*) \
1488       case '$*' in \
1489         */*) b='$*';; \
1490           *) b=`echo '$@' | sed 's/\.log$$//'`; \
1491        esac;; \
1492     *) \
1493       b='$*';; \
1494   esac
1495 am__test_logs1 = $(TESTS:=.log)
1496 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1497 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1498 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1499 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1500         $(TEST_LOG_FLAGS)
1501 DIST_SUBDIRS = $(SUBDIRS)
1502 ACLOCAL = @ACLOCAL@
1503 AMTAR = @AMTAR@
1504 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1505 AR = @AR@
1506 AR_FOR_BUILD = @AR_FOR_BUILD@
1507 AS_FOR_TARGET = @AS_FOR_TARGET@
1508 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1509 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1510 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1511 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1512 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1513 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1514 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1515 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1516 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1517 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1518 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1519 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1520 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1521 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1522 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1523 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1524 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1525 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1526 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1527 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1528 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1529 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1530 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1531 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1532 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1533 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1534 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1535 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1536 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1537 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1538 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1539 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1540 AUTOCONF = @AUTOCONF@
1541 AUTOHEADER = @AUTOHEADER@
1542 AUTOMAKE = @AUTOMAKE@
1543 AWK = @AWK@
1544 CC = @CC@
1545 CCDEPMODE = @CCDEPMODE@
1546 CC_FOR_BUILD = @CC_FOR_BUILD@
1547 CC_FOR_TARGET = @CC_FOR_TARGET@
1548 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1549 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1550 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1551 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1552 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1553 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1554 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1555 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1556 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1557 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1558 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1559 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1560 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1561 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1562 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1563 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1564 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1565 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1566 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1567 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1568 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1569 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1570 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1571 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1572 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1573 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1574 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1575 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1576 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1577 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1578 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1579 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1580 CFLAGS = @CFLAGS@
1581 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1582 CGEN_MAINT = @CGEN_MAINT@
1583 CPP = @CPP@
1584 CPPFLAGS = @CPPFLAGS@
1585 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1586 CYGPATH_W = @CYGPATH_W@
1587 C_DIALECT = @C_DIALECT@
1588 DEFS = @DEFS@
1589 DEPDIR = @DEPDIR@
1590 DSYMUTIL = @DSYMUTIL@
1591 DTC = @DTC@
1592 DUMPBIN = @DUMPBIN@
1593 ECHO_C = @ECHO_C@
1594 ECHO_N = @ECHO_N@
1595 ECHO_T = @ECHO_T@
1596 EGREP = @EGREP@
1597 EXEEXT = @EXEEXT@
1598 FGREP = @FGREP@
1599 GREP = @GREP@
1600 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1601 INSTALL = @INSTALL@
1602 INSTALL_DATA = @INSTALL_DATA@
1603 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1604 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1605 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1606 LD = @LD@
1607 LDFLAGS = @LDFLAGS@
1608 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1609 LD_FOR_TARGET = @LD_FOR_TARGET@
1610 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1611 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1612 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1613 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1614 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1615 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1616 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1617 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1618 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1619 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1620 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1621 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1622 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1623 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1624 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1625 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1626 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1627 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1628 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1629 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1630 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1631 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1632 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1633 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1634 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1635 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1636 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1637 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1638 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1639 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1640 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1641 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1642 LIBOBJS = @LIBOBJS@
1643 LIBS = @LIBS@
1644 LIBTOOL = @LIBTOOL@
1645 LIPO = @LIPO@
1646 LN_S = @LN_S@
1647 LTLIBOBJS = @LTLIBOBJS@
1648 MAINT = @MAINT@
1649 MAKEINFO = @MAKEINFO@
1650 MKDIR_P = @MKDIR_P@
1651 NM = @NM@
1652 NMEDIT = @NMEDIT@
1653 OBJDUMP = @OBJDUMP@
1654 OBJEXT = @OBJEXT@
1655 OTOOL = @OTOOL@
1656 OTOOL64 = @OTOOL64@
1657 PACKAGE = @PACKAGE@
1658 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1659 PACKAGE_NAME = @PACKAGE_NAME@
1660 PACKAGE_STRING = @PACKAGE_STRING@
1661 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1662 PACKAGE_URL = @PACKAGE_URL@
1663 PACKAGE_VERSION = @PACKAGE_VERSION@
1664 PATH_SEPARATOR = @PATH_SEPARATOR@
1665 PKGVERSION = @PKGVERSION@
1666 PKG_CONFIG = @PKG_CONFIG@
1667 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1668 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1669 RANLIB = @RANLIB@
1670 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1671 READLINE_CFLAGS = @READLINE_CFLAGS@
1672 READLINE_LIB = @READLINE_LIB@
1673 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1674 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1675 SDL_CFLAGS = @SDL_CFLAGS@
1676 SDL_LIBS = @SDL_LIBS@
1677 SED = @SED@
1678 SET_MAKE = @SET_MAKE@
1679 SHELL = @SHELL@
1680 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1681 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1682 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1683 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1684 SIM_INLINE = @SIM_INLINE@
1685 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1686 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1687 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1688 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1689 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1690 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1691 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1692 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1693 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1694 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1695 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1696 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1697 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1698 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1699 STRIP = @STRIP@
1700 TERMCAP_LIB = @TERMCAP_LIB@
1701 VERSION = @VERSION@
1702 WARN_CFLAGS = @WARN_CFLAGS@
1703 WERROR_CFLAGS = @WERROR_CFLAGS@
1704 abs_builddir = @abs_builddir@
1705 abs_srcdir = @abs_srcdir@
1706 abs_top_builddir = @abs_top_builddir@
1707 abs_top_srcdir = @abs_top_srcdir@
1708 ac_ct_CC = @ac_ct_CC@
1709 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1710 am__include = @am__include@
1711 am__leading_dot = @am__leading_dot@
1712 am__quote = @am__quote@
1713 am__tar = @am__tar@
1714 am__untar = @am__untar@
1715 bindir = @bindir@
1716 build = @build@
1717 build_alias = @build_alias@
1718 build_cpu = @build_cpu@
1719 build_os = @build_os@
1720 build_vendor = @build_vendor@
1721 builddir = @builddir@
1722 cgen = @cgen@
1723 cgendir = @cgendir@
1724 datadir = @datadir@
1725 datarootdir = @datarootdir@
1726 docdir = @docdir@
1727 dvidir = @dvidir@
1728 exec_prefix = @exec_prefix@
1729 host = @host@
1730 host_alias = @host_alias@
1731 host_cpu = @host_cpu@
1732 host_os = @host_os@
1733 host_vendor = @host_vendor@
1734 htmldir = @htmldir@
1735 includedir = @includedir@
1736 infodir = @infodir@
1737 install_sh = @install_sh@
1738 libdir = @libdir@
1739 libexecdir = @libexecdir@
1740 localedir = @localedir@
1741 localstatedir = @localstatedir@
1742 mandir = @mandir@
1743 mkdir_p = @mkdir_p@
1744 oldincludedir = @oldincludedir@
1745 pdfdir = @pdfdir@
1746 prefix = @prefix@
1747 program_transform_name = @program_transform_name@
1748 psdir = @psdir@
1749 sbindir = @sbindir@
1750 sharedstatedir = @sharedstatedir@
1751 srcdir = @srcdir@
1752 subdirs = @subdirs@
1753 sysconfdir = @sysconfdir@
1754 target = @target@
1755 target_alias = @target_alias@
1756 target_cpu = @target_cpu@
1757 target_os = @target_os@
1758 target_vendor = @target_vendor@
1759 top_build_prefix = @top_build_prefix@
1760 top_builddir = @top_builddir@
1761 top_srcdir = @top_srcdir@
1762 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1763 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1764 GNULIB_PARENT_DIR = ..
1765 srccom = $(srcdir)/common
1766 srcroot = $(srcdir)/..
1767 SUBDIRS = @subdirs@
1768 pkginclude_HEADERS = $(am__append_1)
1769 EXTRA_LIBRARIES = igen/libigen.a
1770 noinst_LIBRARIES = common/libcommon.a $(am__append_3) $(am__append_5) \
1771         $(am__append_7) $(am__append_9) $(am__append_11) \
1772         $(am__append_13) $(am__append_18) $(am__append_23) \
1773         $(am__append_28) $(am__append_32) $(am__append_34) \
1774         $(am__append_38) $(am__append_40) $(am__append_42) \
1775         $(am__append_46) $(am__append_50) $(am__append_54) \
1776         $(am__append_58) $(am__append_62) $(am__append_64) \
1777         $(am__append_69) $(am__append_77) $(am__append_81) \
1778         $(am__append_83) $(am__append_85) $(am__append_91) \
1779         $(am__append_93) $(am__append_95) $(am__append_97) \
1780         $(am__append_99) $(am__append_104)
1781 BUILT_SOURCES = $(am__append_15) $(am__append_21) $(am__append_25) \
1782         $(am__append_36) $(am__append_44) $(am__append_48) \
1783         $(am__append_56) $(am__append_71) $(am__append_79) \
1784         $(am__append_87) $(am__append_101) $(am__append_106)
1785 CLEANFILES = common/version.c common/version.c-stamp \
1786         testsuite/common/bits-gen testsuite/common/bits32m0.c \
1787         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1788         testsuite/common/bits64m63.c
1789 DISTCLEANFILES = $(am__append_76)
1790 MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
1791         $(SIM_ENABLED_ARCHES:%=%/hw-config.h) \
1792         $(SIM_ENABLED_ARCHES:%=%/stamp-hw) \
1793         $(SIM_ENABLED_ARCHES:%=%/modules.c) \
1794         $(SIM_ENABLED_ARCHES:%=%/stamp-modules) $(igen_IGEN_TOOLS) \
1795         site-sim-config.exp testrun.log testrun.sum $(am__append_17) \
1796         $(am__append_22) $(am__append_27) $(am__append_37) \
1797         $(am__append_45) $(am__append_49) $(am__append_53) \
1798         $(am__append_57) $(am__append_61) $(am__append_75) \
1799         $(am__append_80) $(am__append_88) $(am__append_103) \
1800         $(am__append_107)
1801 AM_CFLAGS = \
1802         $(WERROR_CFLAGS) \
1803         $(WARN_CFLAGS) \
1804         $(AM_CFLAGS_$(subst -,_,$(@D))) \
1805         $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F)))
1806
1807 AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \
1808         -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \
1809         $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \
1810         -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD
1811 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1812         $(SIM_INLINE) -I$(srcdir)/common
1813 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1814 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1815 SIM_ALL_RECURSIVE_DEPS = $(am__append_89)
1816 SIM_INSTALL_DATA_LOCAL_DEPS =
1817 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_30)
1818 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_31)
1819 SIM_DEPBASE = $(@D)/$(DEPDIR)/$(@F:.o=)
1820 SIM_COMPILE = \
1821         $(AM_V_CC)$(COMPILE) -MT $@ -MD -MP -MF $(SIM_DEPBASE).Tpo -c -o $@ $< && \
1822         $(am__mv) $(SIM_DEPBASE).Tpo $(SIM_DEPBASE).Po
1823
1824 AM_CPPFLAGS_common = -DSIM_COMMON_BUILD
1825 common_libcommon_a_SOURCES = \
1826         common/callback.c \
1827         common/portability.c \
1828         common/sim-load.c \
1829         common/sim-signal.c \
1830         common/syscall.c \
1831         common/target-newlib-errno.c \
1832         common/target-newlib-open.c \
1833         common/target-newlib-signal.c \
1834         common/target-newlib-syscall.c \
1835         common/version.c
1836
1837 SIM_COMMON_HW_OBJS = \
1838         hw-alloc.o \
1839         hw-base.o \
1840         hw-device.o \
1841         hw-events.o \
1842         hw-handles.o \
1843         hw-instances.o \
1844         hw-ports.o \
1845         hw-properties.o \
1846         hw-tree.o \
1847         sim-hw.o
1848
1849 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1850         sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1851         sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1852         sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1853         sim-options.o sim-profile.o sim-reason.o sim-reg.o sim-stop.o \
1854         sim-syscall.o sim-trace.o sim-utils.o sim-watch.o \
1855         $(am__append_2)
1856 SIM_HW_DEVICES = cfi core pal glue
1857 am_arch_d = $(subst -,_,$(@D))
1858 GEN_MODULES_C_SRCS = \
1859         $(wildcard \
1860                 $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \
1861                 $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1862                 $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1863
1864 LIBIBERTY_LIB = ../libiberty/libiberty.a
1865 BFD_LIB = ../bfd/libbfd.la
1866 OPCODES_LIB = ../opcodes/libopcodes.la
1867 SIM_COMMON_LIBS = \
1868         $(BFD_LIB) \
1869         $(OPCODES_LIB) \
1870         $(LIBIBERTY_LIB) \
1871         $(LIBGNU) \
1872         $(LIBGNU_EXTRA_LIBS)
1873
1874 GUILE = guile
1875 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1876 CGENFLAGS = -v
1877 CGEN_CPU_DIR = $(cgendir)/cpu
1878 CPU_DIR = $(srcroot)/cpu
1879 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1880 CGEN_READ_SCM = $(cgendir)/sim.scm
1881 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1882 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1883 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1884 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1885 CGEN_CPU_EXTR = /extr/
1886 CGEN_CPU_READ = /read/
1887 CGEN_CPU_WRITE = /write/
1888 CGEN_CPU_SEM = /sem/
1889 CGEN_CPU_SEMSW = /semsw/
1890 CGEN_WRAPPER = $(srccom)/cgen.sh
1891 CGEN_GEN_ARCH = \
1892         $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1893                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1894                 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1895                 $(CGEN_ARCHFILE) ignored
1896
1897 CGEN_GEN_CPU = \
1898         $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1899                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1900                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1901                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1902
1903 CGEN_GEN_DEFS = \
1904         $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1905                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1906                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1907                 $(CGEN_ARCHFILE) ignored
1908
1909 CGEN_GEN_DECODE = \
1910         $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1911                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1912                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1913                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1914
1915 CGEN_GEN_CPU_DECODE = \
1916         $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1917                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1918                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1919                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1920
1921 CGEN_GEN_CPU_DESC = \
1922         $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1923                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1924                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1925                 $(CGEN_ARCHFILE) ignored $$opcfile
1926
1927
1928 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
1929 # leak detection while running it.
1930 IGEN = igen/igen$(EXEEXT)
1931 IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1932 igen_libigen_a_SOURCES = \
1933         igen/table.c \
1934         igen/lf.c \
1935         igen/misc.c \
1936         igen/filter_host.c \
1937         igen/ld-decode.c \
1938         igen/ld-cache.c \
1939         igen/filter.c \
1940         igen/ld-insn.c \
1941         igen/gen-model.c \
1942         igen/gen-itable.c \
1943         igen/gen-icache.c \
1944         igen/gen-semantics.c \
1945         igen/gen-idecode.c \
1946         igen/gen-support.c \
1947         igen/gen-engine.c \
1948         igen/gen.c
1949
1950 igen_igen_SOURCES = igen/igen.c
1951 igen_igen_LDADD = igen/libigen.a
1952 igen_filter_SOURCES =
1953 igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1954 igen_gen_SOURCES =
1955 igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1956 igen_ld_cache_SOURCES =
1957 igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1958 igen_ld_decode_SOURCES =
1959 igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1960 igen_ld_insn_SOURCES =
1961 igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1962 igen_table_SOURCES =
1963 igen_table_LDADD = igen/table-main.o igen/libigen.a
1964 igen_IGEN_TOOLS = \
1965         $(IGEN) \
1966         igen/filter \
1967         igen/gen \
1968         igen/ld-cache \
1969         igen/ld-decode \
1970         igen/ld-insn \
1971         igen/table
1972
1973 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1974
1975 # Custom verbose test variables that automake doesn't provide (yet?).
1976 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1977 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1978 AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
1979 AM_V_RUNTEST_1 =
1980 DO_RUNTEST = \
1981         LC_ALL=C; export LC_ALL; \
1982         EXPECT=${EXPECT} ; export EXPECT ; \
1983         runtest=$(RUNTEST); \
1984         $$runtest $(RUNTESTFLAGS)
1985
1986 testsuite_common_CPPFLAGS = \
1987         -I$(srcdir)/common \
1988         -I$(srcroot)/include \
1989         -I../bfd
1990
1991 @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_SOURCES = \
1992 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.c
1993
1994 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES = \
1995 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(common_libcommon_a_SOURCES)
1996
1997 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1998 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
1999 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
2000 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
2001 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
2002 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
2003 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
2004 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
2005
2006 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
2007 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
2008 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o \
2009 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/libsim.a \
2010 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(SIM_COMMON_LIBS)
2011
2012 @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET
2013 @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_SOURCES = \
2014 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.c
2015
2016 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES = \
2017 @SIM_ENABLE_ARCH_arm_TRUE@      $(common_libcommon_a_SOURCES)
2018
2019 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
2020 @SIM_ENABLE_ARCH_arm_TRUE@      arm/wrapper.o \
2021 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
2022 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
2023 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o \
2024 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
2025 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armvirt.o arm/thumbemu.o \
2026 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armcopro.o arm/maverick.o arm/iwmmxt.o
2027
2028 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
2029 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
2030 @SIM_ENABLE_ARCH_arm_TRUE@      arm/nrun.o \
2031 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a \
2032 @SIM_ENABLE_ARCH_arm_TRUE@      $(SIM_COMMON_LIBS)
2033
2034 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
2035 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
2036 @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_SOURCES = \
2037 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.c
2038
2039 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES = \
2040 @SIM_ENABLE_ARCH_avr_TRUE@      $(common_libcommon_a_SOURCES)
2041
2042 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
2043 @SIM_ENABLE_ARCH_avr_TRUE@      avr/interp.o \
2044 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
2045 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
2046 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
2047
2048 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
2049 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
2050 @SIM_ENABLE_ARCH_avr_TRUE@      avr/nrun.o \
2051 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a \
2052 @SIM_ENABLE_ARCH_avr_TRUE@      $(SIM_COMMON_LIBS)
2053
2054 @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS)
2055 @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_SOURCES = \
2056 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.c
2057
2058 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES = \
2059 @SIM_ENABLE_ARCH_bfin_TRUE@     $(common_libcommon_a_SOURCES)
2060
2061 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
2062 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2063 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2064 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2065 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o \
2066 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/devices.o \
2067 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o \
2068 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/interp.o \
2069 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o \
2070 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
2071
2072 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2073 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2074 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/nrun.o \
2075 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a \
2076 @SIM_ENABLE_ARCH_bfin_TRUE@     $(SIM_COMMON_LIBS)
2077
2078 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2079 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_cec \
2080 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ctimer \
2081 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dma \
2082 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dmac \
2083 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_amc \
2084 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_ddrc \
2085 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_sdc \
2086 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_emac \
2087 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_eppi \
2088 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_evt \
2089 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio \
2090 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio2 \
2091 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gptimer \
2092 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_jtag \
2093 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_mmu \
2094 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_nfc \
2095 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_otp \
2096 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pfmon \
2097 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pint \
2098 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pll \
2099 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ppi \
2100 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_rtc \
2101 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_sic \
2102 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_spi \
2103 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_trace \
2104 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_twi \
2105 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart \
2106 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart2 \
2107 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wdog \
2108 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wp \
2109 @SIM_ENABLE_ARCH_bfin_TRUE@     eth_phy
2110
2111 @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_SOURCES = \
2112 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.c
2113
2114 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES = \
2115 @SIM_ENABLE_ARCH_bpf_TRUE@      $(common_libcommon_a_SOURCES)
2116
2117 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
2118 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-sim.o \
2119 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2120 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
2121 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-resume.o
2122
2123 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2124 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2125 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/nrun.o \
2126 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a \
2127 @SIM_ENABLE_ARCH_bpf_TRUE@      $(SIM_COMMON_LIBS)
2128
2129 @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_SOURCES = \
2130 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.c
2131
2132 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES = \
2133 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_SOURCES)
2134
2135 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2136 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2137 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2138 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o \
2139 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o \
2140 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o \
2141 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
2142
2143 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2144 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2145 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/nrun.o \
2146 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a \
2147 @SIM_ENABLE_ARCH_cr16_TRUE@     $(SIM_COMMON_LIBS)
2148
2149 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2150 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode$(EXEEXT) \
2151 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.c
2152
2153 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2154 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
2155 @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_SOURCES = \
2156 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.c
2157
2158 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES = \
2159 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_SOURCES)
2160
2161 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
2162 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2163 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2164 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
2165 @SIM_ENABLE_ARCH_cris_TRUE@     \
2166 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o \
2167 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
2168 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o \
2169 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-utils.o \
2170 @SIM_ENABLE_ARCH_cris_TRUE@     \
2171 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o \
2172 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv10f.o \
2173 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o \
2174 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev10.o \
2175 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o \
2176 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.o \
2177 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o \
2178 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv32.o \
2179 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o \
2180 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv32.o \
2181 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o \
2182 @SIM_ENABLE_ARCH_cris_TRUE@     \
2183 @SIM_ENABLE_ARCH_cris_TRUE@     cris/sim-if.o \
2184 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
2185
2186 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2187 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2188 @SIM_ENABLE_ARCH_cris_TRUE@     cris/nrun.o \
2189 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a \
2190 @SIM_ENABLE_ARCH_cris_TRUE@     $(SIM_COMMON_LIBS)
2191
2192 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
2193 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2194 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
2195 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
2196 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.c \
2197 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v10f \
2198 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.c \
2199 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v32f
2200
2201 @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_SOURCES = \
2202 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.c
2203
2204 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES = \
2205 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_SOURCES)
2206
2207 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
2208 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o \
2209 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2210 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2211 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o \
2212 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o \
2213 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o \
2214 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
2215
2216 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2217 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2218 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/nrun.o \
2219 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a \
2220 @SIM_ENABLE_ARCH_d10v_TRUE@     $(SIM_COMMON_LIBS)
2221
2222 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2223 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode$(EXEEXT) \
2224 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.c
2225
2226 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2227 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2228 @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC = $(srcroot)/readline/readline
2229 @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 = $(READLINE_CFLAGS) \
2230 @SIM_ENABLE_ARCH_erc32_TRUE@    -DFAST_UART
2231 @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_SOURCES = \
2232 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.c
2233
2234 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES = \
2235 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_SOURCES)
2236
2237 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2238 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o \
2239 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/exec.o \
2240 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o \
2241 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/func.o \
2242 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o \
2243 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/interf.o
2244
2245 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2246 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2247 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis.o \
2248 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
2249 @SIM_ENABLE_ARCH_erc32_TRUE@    $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2250
2251 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2252 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2253 @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_SOURCES = \
2254 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.c
2255
2256 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES = \
2257 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_SOURCES)
2258
2259 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2260 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2261 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2262 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2263 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2264 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2265
2266 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2267 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2268 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2269 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2270 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2271
2272 @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS)
2273 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o = -Wno-error
2274 @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error
2275 @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_SOURCES = \
2276 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.c
2277
2278 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES = \
2279 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_SOURCES)
2280
2281 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2282 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2283 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2284 @SIM_ENABLE_ARCH_frv_TRUE@      \
2285 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o \
2286 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o \
2287 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o \
2288 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o \
2289 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o \
2290 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o \
2291 @SIM_ENABLE_ARCH_frv_TRUE@      \
2292 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o \
2293 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o \
2294 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cpu.o \
2295 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o \
2296 @SIM_ENABLE_ARCH_frv_TRUE@      frv/frv.o \
2297 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.o \
2298 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o \
2299 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sem.o \
2300 @SIM_ENABLE_ARCH_frv_TRUE@      \
2301 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cache.o \
2302 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o \
2303 @SIM_ENABLE_ARCH_frv_TRUE@      frv/memory.o \
2304 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o \
2305 @SIM_ENABLE_ARCH_frv_TRUE@      frv/pipeline.o \
2306 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o \
2307 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr400.o \
2308 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
2309 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
2310 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o \
2311 @SIM_ENABLE_ARCH_frv_TRUE@      frv/registers.o \
2312 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o \
2313 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sim-if.o \
2314 @SIM_ENABLE_ARCH_frv_TRUE@      frv/traps.o
2315
2316 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2317 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2318 @SIM_ENABLE_ARCH_frv_TRUE@      frv/nrun.o \
2319 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a \
2320 @SIM_ENABLE_ARCH_frv_TRUE@      $(SIM_COMMON_LIBS)
2321
2322 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2323 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2324 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2325 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.c \
2326 @SIM_ENABLE_ARCH_frv_TRUE@      frv/stamp-mloop
2327
2328 @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_SOURCES = \
2329 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.c
2330
2331 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES = \
2332 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_SOURCES)
2333
2334 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2335 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2336 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2337 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o \
2338 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
2339
2340 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2341 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2342 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/nrun.o \
2343 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a \
2344 @SIM_ENABLE_ARCH_ft32_TRUE@     $(SIM_COMMON_LIBS)
2345
2346 @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_SOURCES = \
2347 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.c
2348
2349 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES = \
2350 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_SOURCES)
2351
2352 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2353 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o \
2354 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2355 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2356 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
2357
2358 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2359 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2360 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/nrun.o \
2361 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
2362 @SIM_ENABLE_ARCH_h8300_TRUE@    $(SIM_COMMON_LIBS)
2363
2364 @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_SOURCES = \
2365 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/modules.c
2366
2367 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES = \
2368 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(common_libcommon_a_SOURCES)
2369
2370 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2371 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2372 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2373 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2374 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-run.o \
2375 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-scache.o \
2376 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-trace.o \
2377 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cgen-utils.o \
2378 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2379 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/arch.o \
2380 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/cpu.o \
2381 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/decode.o \
2382 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/iq2000.o \
2383 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sem.o \
2384 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.o \
2385 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/model.o \
2386 @SIM_ENABLE_ARCH_iq2000_TRUE@   \
2387 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/sim-if.o
2388
2389 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2390 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2391 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/nrun.o \
2392 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
2393 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(SIM_COMMON_LIBS)
2394
2395 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2396 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.c \
2397 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/stamp-mloop
2398
2399 @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_SOURCES = \
2400 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/modules.c
2401
2402 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES = \
2403 @SIM_ENABLE_ARCH_lm32_TRUE@     $(common_libcommon_a_SOURCES)
2404
2405 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2406 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2407 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2408 @SIM_ENABLE_ARCH_lm32_TRUE@     $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2409 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2410 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-run.o \
2411 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-scache.o \
2412 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-trace.o \
2413 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cgen-utils.o \
2414 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2415 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/arch.o \
2416 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/cpu.o \
2417 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/decode.o \
2418 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sem.o \
2419 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.o \
2420 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/model.o \
2421 @SIM_ENABLE_ARCH_lm32_TRUE@     \
2422 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/lm32.o \
2423 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/sim-if.o \
2424 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/traps.o \
2425 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/user.o
2426
2427 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2428 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2429 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/nrun.o \
2430 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a \
2431 @SIM_ENABLE_ARCH_lm32_TRUE@     $(SIM_COMMON_LIBS)
2432
2433 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2434 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2435 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.c \
2436 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/stamp-mloop
2437
2438 @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c = -DTIMER_A
2439 @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_SOURCES = \
2440 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/modules.c
2441
2442 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES = \
2443 @SIM_ENABLE_ARCH_m32c_TRUE@     $(common_libcommon_a_SOURCES)
2444
2445 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2446 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/gdb-if.o \
2447 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/int.o \
2448 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/load.o \
2449 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.o \
2450 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/mem.o \
2451 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/misc.o \
2452 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.o \
2453 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/reg.o \
2454 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/srcdest.o \
2455 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/syscalls.o \
2456 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/trace.o
2457
2458 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2459 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2460 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/main.o \
2461 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a \
2462 @SIM_ENABLE_ARCH_m32c_TRUE@     $(SIM_COMMON_LIBS)
2463
2464 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2465 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c$(EXEEXT) \
2466 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c \
2467 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c
2468
2469 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2470
2471 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
2472 # leak detection while running it.
2473 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2474 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error
2475 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error
2476 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error
2477 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error
2478 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error
2479 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error
2480 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error
2481 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error
2482 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error
2483 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error
2484 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error
2485 @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error
2486 @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_SOURCES = \
2487 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modules.c
2488
2489 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES = \
2490 @SIM_ENABLE_ARCH_m32r_TRUE@     $(common_libcommon_a_SOURCES)
2491
2492 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2493 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2494 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2495 @SIM_ENABLE_ARCH_m32r_TRUE@     $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2496 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2497 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-run.o \
2498 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-scache.o \
2499 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-trace.o \
2500 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cgen-utils.o \
2501 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2502 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/arch.o \
2503 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2504 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r.o \
2505 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu.o \
2506 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode.o \
2507 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sem.o \
2508 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model.o \
2509 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.o \
2510 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2511 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32rx.o \
2512 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpux.o \
2513 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decodex.o \
2514 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/modelx.o \
2515 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.o \
2516 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2517 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/m32r2.o \
2518 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/cpu2.o \
2519 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/decode2.o \
2520 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/model2.o \
2521 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.o \
2522 @SIM_ENABLE_ARCH_m32r_TRUE@     \
2523 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/sim-if.o \
2524 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/traps.o
2525
2526 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2527 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2528 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/nrun.o \
2529 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a \
2530 @SIM_ENABLE_ARCH_m32r_TRUE@     $(SIM_COMMON_LIBS)
2531
2532 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2533 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2534 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.c \
2535 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop \
2536 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.c \
2537 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-x \
2538 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.c \
2539 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-2
2540
2541 @SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11 = \
2542 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_WORD_BITSIZE=32 \
2543 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_CELL_BITSIZE=32 \
2544 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_ADDRESS_BITSIZE=32 \
2545 @SIM_ENABLE_ARCH_m68hc11_TRUE@  -DWITH_TARGET_WORD_MSB=31
2546
2547 @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_SOURCES = \
2548 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/modules.c
2549
2550 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES = \
2551 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(common_libcommon_a_SOURCES)
2552
2553 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2554 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interp.o \
2555 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.o \
2556 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.o \
2557 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/emulos.o \
2558 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/interrupts.o \
2559 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11_sim.o \
2560 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2561 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2562 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2563 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/sim-resume.o
2564
2565 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2566 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2567 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o \
2568 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/libsim.a \
2569 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(SIM_COMMON_LIBS)
2570
2571 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2572 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2573 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode$(EXEEXT) \
2574 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.c \
2575 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.c
2576
2577 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2578 @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_SOURCES = \
2579 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/modules.c
2580
2581 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES = \
2582 @SIM_ENABLE_ARCH_mcore_TRUE@    $(common_libcommon_a_SOURCES)
2583
2584 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
2585 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/interp.o \
2586 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2587 @SIM_ENABLE_ARCH_mcore_TRUE@    $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
2588 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/sim-resume.o
2589
2590 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2591 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2592 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/nrun.o \
2593 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
2594 @SIM_ENABLE_ARCH_mcore_TRUE@    $(SIM_COMMON_LIBS)
2595
2596 @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_SOURCES = \
2597 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/modules.c
2598
2599 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES = \
2600 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(common_libcommon_a_SOURCES)
2601
2602 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
2603 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/interp.o \
2604 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2605 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
2606 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/sim-resume.o
2607
2608 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2609 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2610 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
2611 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
2612 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(SIM_COMMON_LIBS)
2613
2614 @SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips = \
2615 @SIM_ENABLE_ARCH_mips_TRUE@     @SIM_MIPS_SUBTARGET@ \
2616 @SIM_ENABLE_ARCH_mips_TRUE@     -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
2617 @SIM_ENABLE_ARCH_mips_TRUE@     -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
2618
2619 @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_66) \
2620 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_67) $(am__append_68)
2621 @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_SOURCES = \
2622 @SIM_ENABLE_ARCH_mips_TRUE@     mips/modules.c
2623
2624 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES = \
2625 @SIM_ENABLE_ARCH_mips_TRUE@     $(common_libcommon_a_SOURCES)
2626
2627 @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
2628 @SIM_ENABLE_ARCH_mips_TRUE@     mips/interp.o \
2629 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_GEN_OBJ) \
2630 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2631 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2632 @SIM_ENABLE_ARCH_mips_TRUE@     $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2633 @SIM_ENABLE_ARCH_mips_TRUE@     mips/cp1.o \
2634 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.o \
2635 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.o \
2636 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-main.o \
2637 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sim-resume.o
2638
2639 @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
2640 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2641 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2642 @SIM_ENABLE_ARCH_mips_TRUE@     mips/nrun.o \
2643 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a \
2644 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_COMMON_LIBS)
2645
2646 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2647 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2648 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.h \
2649 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.c
2650
2651 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2652 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.h \
2653 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.c \
2654 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.h \
2655 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.c \
2656 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.h \
2657 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.c \
2658 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.h \
2659 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.c \
2660 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.h \
2661 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.c \
2662 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.h \
2663 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.c \
2664 @SIM_ENABLE_ARCH_mips_TRUE@     mips/irun.c
2665
2666 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2667 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.h \
2668 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.c \
2669 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.h \
2670 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.c \
2671 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.h \
2672 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.c \
2673 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.h \
2674 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.c \
2675 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.h \
2676 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.c \
2677 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2678 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.h \
2679 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.c \
2680 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.h \
2681 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.c \
2682 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.h \
2683 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.c \
2684 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.h \
2685 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.c \
2686 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.h \
2687 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.c
2688
2689 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
2690 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2691 @SIM_ENABLE_ARCH_mips_TRUE@     mips/stamp-igen-itable \
2692 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_72) $(am__append_73) \
2693 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_74)
2694 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2695 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2696 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2697 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.igen \
2698 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp2.igen \
2699 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16.igen \
2700 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16e.igen \
2701 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.igen \
2702 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromipsdsp.igen \
2703 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromips.igen \
2704 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r2.igen \
2705 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r6.igen \
2706 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3d.igen \
2707 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sb1.igen \
2708 @SIM_ENABLE_ARCH_mips_TRUE@     mips/tx.igen \
2709 @SIM_ENABLE_ARCH_mips_TRUE@     mips/vr.igen
2710
2711 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2712 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2713 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2714 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2715 @SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300 = \
2716 @SIM_ENABLE_ARCH_mn10300_TRUE@  -DPOLL_QUIT_INTERVAL=0x20 \
2717 @SIM_ENABLE_ARCH_mn10300_TRUE@  -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2718
2719 @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_SOURCES = \
2720 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/modules.c
2721
2722 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES = \
2723 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(common_libcommon_a_SOURCES)
2724
2725 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
2726 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.o \
2727 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.o \
2728 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.o \
2729 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.o \
2730 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.o \
2731 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.o \
2732 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.o \
2733 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2734 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2735 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2736 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/interp.o \
2737 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/op_utils.o \
2738 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/sim-resume.o
2739
2740 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2741 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2742 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o \
2743 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/libsim.a \
2744 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(SIM_COMMON_LIBS)
2745
2746 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2747 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2748 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
2749 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.c \
2750 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
2751 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.c \
2752 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
2753 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.c \
2754 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
2755 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.c \
2756 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
2757 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.c \
2758 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
2759 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.c \
2760 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h \
2761 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.c \
2762 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.c
2763
2764 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2765 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(mn10300_BUILT_SRC_FROM_IGEN) \
2766 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/stamp-igen
2767
2768 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2769 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2770 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2771 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2772 @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie = -DDTB="\"$(dtbdir)/moxie-gdb.dtb\""
2773 @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_SOURCES = \
2774 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/modules.c
2775
2776 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES = \
2777 @SIM_ENABLE_ARCH_moxie_TRUE@    $(common_libcommon_a_SOURCES)
2778
2779 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
2780 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2781 @SIM_ENABLE_ARCH_moxie_TRUE@    $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2782 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/interp.o \
2783 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/sim-resume.o
2784
2785 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2786 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2787 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/nrun.o \
2788 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
2789 @SIM_ENABLE_ARCH_moxie_TRUE@    $(SIM_COMMON_LIBS)
2790
2791 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2792 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2793 @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_SOURCES = \
2794 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/modules.c
2795
2796 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES = \
2797 @SIM_ENABLE_ARCH_msp430_TRUE@   $(common_libcommon_a_SOURCES)
2798
2799 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
2800 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2801 @SIM_ENABLE_ARCH_msp430_TRUE@   $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2802 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/msp430-sim.o \
2803 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/sim-resume.o
2804
2805 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2806 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2807 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/nrun.o \
2808 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
2809 @SIM_ENABLE_ARCH_msp430_TRUE@   $(SIM_COMMON_LIBS)
2810
2811 @SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2812 @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_SOURCES = \
2813 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/modules.c
2814
2815 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES = \
2816 @SIM_ENABLE_ARCH_or1k_TRUE@     $(common_libcommon_a_SOURCES)
2817
2818 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
2819 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2820 @SIM_ENABLE_ARCH_or1k_TRUE@     $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
2821 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2822 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-accfp.o \
2823 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-fpu.o \
2824 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-run.o \
2825 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-scache.o \
2826 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-trace.o \
2827 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cgen-utils.o \
2828 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2829 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/arch.o \
2830 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/cpu.o \
2831 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/decode.o \
2832 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.o \
2833 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/model.o \
2834 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sem.o \
2835 @SIM_ENABLE_ARCH_or1k_TRUE@     \
2836 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/or1k.o \
2837 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/sim-if.o \
2838 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/traps.o
2839
2840 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2841 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2842 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/nrun.o \
2843 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a \
2844 @SIM_ENABLE_ARCH_or1k_TRUE@     $(SIM_COMMON_LIBS)
2845
2846 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2847 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2848 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2849 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.c \
2850 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/stamp-mloop
2851
2852 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2853 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2854 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/main.o \
2855 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a \
2856 @SIM_ENABLE_ARCH_ppc_TRUE@      $(SIM_COMMON_LIBS)
2857
2858 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2859 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2860 @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_SOURCES = \
2861 @SIM_ENABLE_ARCH_pru_TRUE@      pru/modules.c
2862
2863 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES = \
2864 @SIM_ENABLE_ARCH_pru_TRUE@      $(common_libcommon_a_SOURCES)
2865
2866 @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
2867 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2868 @SIM_ENABLE_ARCH_pru_TRUE@      $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2869 @SIM_ENABLE_ARCH_pru_TRUE@      pru/interp.o \
2870 @SIM_ENABLE_ARCH_pru_TRUE@      pru/sim-resume.o
2871
2872 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2873 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2874 @SIM_ENABLE_ARCH_pru_TRUE@      pru/nrun.o \
2875 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a \
2876 @SIM_ENABLE_ARCH_pru_TRUE@      $(SIM_COMMON_LIBS)
2877
2878 @SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv = -DWITH_TARGET_WORD_BITSIZE=$(SIM_RISCV_BITSIZE)
2879 @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_SOURCES = \
2880 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/modules.c
2881
2882 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES = \
2883 @SIM_ENABLE_ARCH_riscv_TRUE@    $(common_libcommon_a_SOURCES)
2884
2885 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
2886 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2887 @SIM_ENABLE_ARCH_riscv_TRUE@    $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2888 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/interp.o \
2889 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/machs.o \
2890 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-main.o \
2891 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/sim-resume.o
2892
2893 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2894 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2895 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/nrun.o \
2896 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
2897 @SIM_ENABLE_ARCH_riscv_TRUE@    $(SIM_COMMON_LIBS)
2898
2899 @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_SOURCES = \
2900 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/modules.c
2901
2902 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES = \
2903 @SIM_ENABLE_ARCH_rl78_TRUE@     $(common_libcommon_a_SOURCES)
2904
2905 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
2906 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/load.o \
2907 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/mem.o \
2908 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/cpu.o \
2909 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/rl78.o \
2910 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/gdb-if.o \
2911 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/trace.o
2912
2913 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2914 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2915 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/main.o \
2916 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a \
2917 @SIM_ENABLE_ARCH_rl78_TRUE@     $(SIM_COMMON_LIBS)
2918
2919 @SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx = $(SIM_RX_CYCLE_ACCURATE_FLAGS)
2920 @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_SOURCES = \
2921 @SIM_ENABLE_ARCH_rx_TRUE@       rx/modules.c
2922
2923 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES = \
2924 @SIM_ENABLE_ARCH_rx_TRUE@       $(common_libcommon_a_SOURCES)
2925
2926 @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
2927 @SIM_ENABLE_ARCH_rx_TRUE@       rx/fpu.o \
2928 @SIM_ENABLE_ARCH_rx_TRUE@       rx/load.o \
2929 @SIM_ENABLE_ARCH_rx_TRUE@       rx/mem.o \
2930 @SIM_ENABLE_ARCH_rx_TRUE@       rx/misc.o \
2931 @SIM_ENABLE_ARCH_rx_TRUE@       rx/reg.o \
2932 @SIM_ENABLE_ARCH_rx_TRUE@       rx/rx.o \
2933 @SIM_ENABLE_ARCH_rx_TRUE@       rx/syscalls.o \
2934 @SIM_ENABLE_ARCH_rx_TRUE@       rx/trace.o \
2935 @SIM_ENABLE_ARCH_rx_TRUE@       rx/gdb-if.o \
2936 @SIM_ENABLE_ARCH_rx_TRUE@       rx/err.o
2937
2938 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2939 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2940 @SIM_ENABLE_ARCH_rx_TRUE@       rx/main.o \
2941 @SIM_ENABLE_ARCH_rx_TRUE@       rx/libsim.a \
2942 @SIM_ENABLE_ARCH_rx_TRUE@       $(SIM_COMMON_LIBS)
2943
2944 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2945 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2946 @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_SOURCES = \
2947 @SIM_ENABLE_ARCH_sh_TRUE@       sh/modules.c
2948
2949 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES = \
2950 @SIM_ENABLE_ARCH_sh_TRUE@       $(common_libcommon_a_SOURCES)
2951
2952 @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
2953 @SIM_ENABLE_ARCH_sh_TRUE@       sh/interp.o \
2954 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
2955 @SIM_ENABLE_ARCH_sh_TRUE@       $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
2956 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.o
2957
2958 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2959 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2960 @SIM_ENABLE_ARCH_sh_TRUE@       sh/nrun.o \
2961 @SIM_ENABLE_ARCH_sh_TRUE@       sh/libsim.a \
2962 @SIM_ENABLE_ARCH_sh_TRUE@       $(SIM_COMMON_LIBS)
2963
2964 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2965 @SIM_ENABLE_ARCH_sh_TRUE@       sh/gencode$(EXEEXT) \
2966 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.c
2967
2968 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2969 @SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850 = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2970 @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_SOURCES = \
2971 @SIM_ENABLE_ARCH_v850_TRUE@     v850/modules.c
2972
2973 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES = \
2974 @SIM_ENABLE_ARCH_v850_TRUE@     $(common_libcommon_a_SOURCES)
2975
2976 @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
2977 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
2978 @SIM_ENABLE_ARCH_v850_TRUE@     $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
2979 @SIM_ENABLE_ARCH_v850_TRUE@     v850/simops.o \
2980 @SIM_ENABLE_ARCH_v850_TRUE@     v850/interp.o \
2981 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.o \
2982 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.o \
2983 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.o \
2984 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.o \
2985 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.o \
2986 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.o \
2987 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.o \
2988 @SIM_ENABLE_ARCH_v850_TRUE@     v850/sim-resume.o
2989
2990 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2991 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2992 @SIM_ENABLE_ARCH_v850_TRUE@     v850/nrun.o \
2993 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a \
2994 @SIM_ENABLE_ARCH_v850_TRUE@     $(SIM_COMMON_LIBS)
2995
2996 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2997 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
2998 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.c \
2999 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
3000 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.c \
3001 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
3002 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.c \
3003 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
3004 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.c \
3005 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
3006 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.c \
3007 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
3008 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.c \
3009 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h \
3010 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.c \
3011 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.c
3012
3013 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
3014 @SIM_ENABLE_ARCH_v850_TRUE@     $(v850_BUILT_SRC_FROM_IGEN) \
3015 @SIM_ENABLE_ARCH_v850_TRUE@     v850/stamp-igen
3016
3017 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
3018 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
3019 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
3020 all: $(BUILT_SOURCES) config.h
3021         $(MAKE) $(AM_MAKEFLAGS) all-recursive
3022
3023 .SUFFIXES:
3024 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
3025 am--refresh: Makefile
3026         @:
3027 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
3028         @for dep in $?; do \
3029           case '$(am__configure_deps)' in \
3030             *$$dep*) \
3031               echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
3032               $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
3033                 && exit 0; \
3034               exit 1;; \
3035           esac; \
3036         done; \
3037         echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
3038         $(am__cd) $(top_srcdir) && \
3039           $(AUTOMAKE) --foreign Makefile
3040 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
3041         @case '$?' in \
3042           *config.status*) \
3043             echo ' $(SHELL) ./config.status'; \
3044             $(SHELL) ./config.status;; \
3045           *) \
3046             echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
3047             cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
3048         esac;
3049 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
3050
3051 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
3052         $(SHELL) ./config.status --recheck
3053
3054 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
3055         $(am__cd) $(srcdir) && $(AUTOCONF)
3056 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
3057         $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
3058 $(am__aclocal_m4_deps):
3059
3060 config.h: stamp-h1
3061         @test -f $@ || rm -f stamp-h1
3062         @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
3063
3064 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
3065         @rm -f stamp-h1
3066         cd $(top_builddir) && $(SHELL) ./config.status config.h
3067 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
3068         ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
3069         rm -f stamp-h1
3070         touch $@
3071
3072 distclean-hdr:
3073         -rm -f config.h stamp-h1
3074 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3075         cd $(top_builddir) && $(SHELL) ./config.status $@
3076 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3077         cd $(top_builddir) && $(SHELL) ./config.status $@
3078 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3079         cd $(top_builddir) && $(SHELL) ./config.status $@
3080 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3081         cd $(top_builddir) && $(SHELL) ./config.status $@
3082 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3083         cd $(top_builddir) && $(SHELL) ./config.status $@
3084 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3085         cd $(top_builddir) && $(SHELL) ./config.status $@
3086 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3087         cd $(top_builddir) && $(SHELL) ./config.status $@
3088 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3089         cd $(top_builddir) && $(SHELL) ./config.status $@
3090 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3091         cd $(top_builddir) && $(SHELL) ./config.status $@
3092 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3093         cd $(top_builddir) && $(SHELL) ./config.status $@
3094 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3095         cd $(top_builddir) && $(SHELL) ./config.status $@
3096 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3097         cd $(top_builddir) && $(SHELL) ./config.status $@
3098 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3099         cd $(top_builddir) && $(SHELL) ./config.status $@
3100 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3101         cd $(top_builddir) && $(SHELL) ./config.status $@
3102 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3103         cd $(top_builddir) && $(SHELL) ./config.status $@
3104 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3105         cd $(top_builddir) && $(SHELL) ./config.status $@
3106 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3107         cd $(top_builddir) && $(SHELL) ./config.status $@
3108 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3109         cd $(top_builddir) && $(SHELL) ./config.status $@
3110 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3111         cd $(top_builddir) && $(SHELL) ./config.status $@
3112 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3113         cd $(top_builddir) && $(SHELL) ./config.status $@
3114 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3115         cd $(top_builddir) && $(SHELL) ./config.status $@
3116 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3117         cd $(top_builddir) && $(SHELL) ./config.status $@
3118 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3119         cd $(top_builddir) && $(SHELL) ./config.status $@
3120 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3121         cd $(top_builddir) && $(SHELL) ./config.status $@
3122 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3123         cd $(top_builddir) && $(SHELL) ./config.status $@
3124 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3125         cd $(top_builddir) && $(SHELL) ./config.status $@
3126 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3127         cd $(top_builddir) && $(SHELL) ./config.status $@
3128 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3129         cd $(top_builddir) && $(SHELL) ./config.status $@
3130 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3131         cd $(top_builddir) && $(SHELL) ./config.status $@
3132 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3133         cd $(top_builddir) && $(SHELL) ./config.status $@
3134 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3135         cd $(top_builddir) && $(SHELL) ./config.status $@
3136 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3137         cd $(top_builddir) && $(SHELL) ./config.status $@
3138 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3139         cd $(top_builddir) && $(SHELL) ./config.status $@
3140 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3141         cd $(top_builddir) && $(SHELL) ./config.status $@
3142
3143 clean-noinstLIBRARIES:
3144         -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
3145 common/$(am__dirstamp):
3146         @$(MKDIR_P) common
3147         @: > common/$(am__dirstamp)
3148 common/$(DEPDIR)/$(am__dirstamp):
3149         @$(MKDIR_P) common/$(DEPDIR)
3150         @: > common/$(DEPDIR)/$(am__dirstamp)
3151 common/callback.$(OBJEXT): common/$(am__dirstamp) \
3152         common/$(DEPDIR)/$(am__dirstamp)
3153 common/portability.$(OBJEXT): common/$(am__dirstamp) \
3154         common/$(DEPDIR)/$(am__dirstamp)
3155 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3156         common/$(DEPDIR)/$(am__dirstamp)
3157 common/sim-signal.$(OBJEXT): common/$(am__dirstamp) \
3158         common/$(DEPDIR)/$(am__dirstamp)
3159 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3160         common/$(DEPDIR)/$(am__dirstamp)
3161 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3162         common/$(DEPDIR)/$(am__dirstamp)
3163 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3164         common/$(DEPDIR)/$(am__dirstamp)
3165 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3166         common/$(DEPDIR)/$(am__dirstamp)
3167 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3168         common/$(DEPDIR)/$(am__dirstamp)
3169 common/version.$(OBJEXT): common/$(am__dirstamp) \
3170         common/$(DEPDIR)/$(am__dirstamp)
3171 aarch64/$(am__dirstamp):
3172         @$(MKDIR_P) aarch64
3173         @: > aarch64/$(am__dirstamp)
3174 aarch64/$(DEPDIR)/$(am__dirstamp):
3175         @$(MKDIR_P) aarch64/$(DEPDIR)
3176         @: > aarch64/$(DEPDIR)/$(am__dirstamp)
3177 aarch64/modules.$(OBJEXT): aarch64/$(am__dirstamp) \
3178         aarch64/$(DEPDIR)/$(am__dirstamp)
3179
3180 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3181         $(AM_V_at)-rm -f aarch64/libsim.a
3182         $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3183         $(AM_V_at)$(RANLIB) aarch64/libsim.a
3184 arm/$(am__dirstamp):
3185         @$(MKDIR_P) arm
3186         @: > arm/$(am__dirstamp)
3187 arm/$(DEPDIR)/$(am__dirstamp):
3188         @$(MKDIR_P) arm/$(DEPDIR)
3189         @: > arm/$(DEPDIR)/$(am__dirstamp)
3190 arm/modules.$(OBJEXT): arm/$(am__dirstamp) \
3191         arm/$(DEPDIR)/$(am__dirstamp)
3192
3193 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3194         $(AM_V_at)-rm -f arm/libsim.a
3195         $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3196         $(AM_V_at)$(RANLIB) arm/libsim.a
3197 avr/$(am__dirstamp):
3198         @$(MKDIR_P) avr
3199         @: > avr/$(am__dirstamp)
3200 avr/$(DEPDIR)/$(am__dirstamp):
3201         @$(MKDIR_P) avr/$(DEPDIR)
3202         @: > avr/$(DEPDIR)/$(am__dirstamp)
3203 avr/modules.$(OBJEXT): avr/$(am__dirstamp) \
3204         avr/$(DEPDIR)/$(am__dirstamp)
3205
3206 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3207         $(AM_V_at)-rm -f avr/libsim.a
3208         $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3209         $(AM_V_at)$(RANLIB) avr/libsim.a
3210 bfin/$(am__dirstamp):
3211         @$(MKDIR_P) bfin
3212         @: > bfin/$(am__dirstamp)
3213 bfin/$(DEPDIR)/$(am__dirstamp):
3214         @$(MKDIR_P) bfin/$(DEPDIR)
3215         @: > bfin/$(DEPDIR)/$(am__dirstamp)
3216 bfin/modules.$(OBJEXT): bfin/$(am__dirstamp) \
3217         bfin/$(DEPDIR)/$(am__dirstamp)
3218
3219 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3220         $(AM_V_at)-rm -f bfin/libsim.a
3221         $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3222         $(AM_V_at)$(RANLIB) bfin/libsim.a
3223 bpf/$(am__dirstamp):
3224         @$(MKDIR_P) bpf
3225         @: > bpf/$(am__dirstamp)
3226 bpf/$(DEPDIR)/$(am__dirstamp):
3227         @$(MKDIR_P) bpf/$(DEPDIR)
3228         @: > bpf/$(DEPDIR)/$(am__dirstamp)
3229 bpf/modules.$(OBJEXT): bpf/$(am__dirstamp) \
3230         bpf/$(DEPDIR)/$(am__dirstamp)
3231
3232 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3233         $(AM_V_at)-rm -f bpf/libsim.a
3234         $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3235         $(AM_V_at)$(RANLIB) bpf/libsim.a
3236
3237 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3238         $(AM_V_at)-rm -f common/libcommon.a
3239         $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3240         $(AM_V_at)$(RANLIB) common/libcommon.a
3241 cr16/$(am__dirstamp):
3242         @$(MKDIR_P) cr16
3243         @: > cr16/$(am__dirstamp)
3244 cr16/$(DEPDIR)/$(am__dirstamp):
3245         @$(MKDIR_P) cr16/$(DEPDIR)
3246         @: > cr16/$(DEPDIR)/$(am__dirstamp)
3247 cr16/modules.$(OBJEXT): cr16/$(am__dirstamp) \
3248         cr16/$(DEPDIR)/$(am__dirstamp)
3249
3250 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3251         $(AM_V_at)-rm -f cr16/libsim.a
3252         $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3253         $(AM_V_at)$(RANLIB) cr16/libsim.a
3254 cris/$(am__dirstamp):
3255         @$(MKDIR_P) cris
3256         @: > cris/$(am__dirstamp)
3257 cris/$(DEPDIR)/$(am__dirstamp):
3258         @$(MKDIR_P) cris/$(DEPDIR)
3259         @: > cris/$(DEPDIR)/$(am__dirstamp)
3260 cris/modules.$(OBJEXT): cris/$(am__dirstamp) \
3261         cris/$(DEPDIR)/$(am__dirstamp)
3262
3263 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3264         $(AM_V_at)-rm -f cris/libsim.a
3265         $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3266         $(AM_V_at)$(RANLIB) cris/libsim.a
3267 d10v/$(am__dirstamp):
3268         @$(MKDIR_P) d10v
3269         @: > d10v/$(am__dirstamp)
3270 d10v/$(DEPDIR)/$(am__dirstamp):
3271         @$(MKDIR_P) d10v/$(DEPDIR)
3272         @: > d10v/$(DEPDIR)/$(am__dirstamp)
3273 d10v/modules.$(OBJEXT): d10v/$(am__dirstamp) \
3274         d10v/$(DEPDIR)/$(am__dirstamp)
3275
3276 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3277         $(AM_V_at)-rm -f d10v/libsim.a
3278         $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3279         $(AM_V_at)$(RANLIB) d10v/libsim.a
3280 erc32/$(am__dirstamp):
3281         @$(MKDIR_P) erc32
3282         @: > erc32/$(am__dirstamp)
3283 erc32/$(DEPDIR)/$(am__dirstamp):
3284         @$(MKDIR_P) erc32/$(DEPDIR)
3285         @: > erc32/$(DEPDIR)/$(am__dirstamp)
3286 erc32/modules.$(OBJEXT): erc32/$(am__dirstamp) \
3287         erc32/$(DEPDIR)/$(am__dirstamp)
3288
3289 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3290         $(AM_V_at)-rm -f erc32/libsim.a
3291         $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3292         $(AM_V_at)$(RANLIB) erc32/libsim.a
3293 example-synacor/$(am__dirstamp):
3294         @$(MKDIR_P) example-synacor
3295         @: > example-synacor/$(am__dirstamp)
3296 example-synacor/$(DEPDIR)/$(am__dirstamp):
3297         @$(MKDIR_P) example-synacor/$(DEPDIR)
3298         @: > example-synacor/$(DEPDIR)/$(am__dirstamp)
3299 example-synacor/modules.$(OBJEXT): example-synacor/$(am__dirstamp) \
3300         example-synacor/$(DEPDIR)/$(am__dirstamp)
3301
3302 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3303         $(AM_V_at)-rm -f example-synacor/libsim.a
3304         $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3305         $(AM_V_at)$(RANLIB) example-synacor/libsim.a
3306 frv/$(am__dirstamp):
3307         @$(MKDIR_P) frv
3308         @: > frv/$(am__dirstamp)
3309 frv/$(DEPDIR)/$(am__dirstamp):
3310         @$(MKDIR_P) frv/$(DEPDIR)
3311         @: > frv/$(DEPDIR)/$(am__dirstamp)
3312 frv/modules.$(OBJEXT): frv/$(am__dirstamp) \
3313         frv/$(DEPDIR)/$(am__dirstamp)
3314
3315 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3316         $(AM_V_at)-rm -f frv/libsim.a
3317         $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3318         $(AM_V_at)$(RANLIB) frv/libsim.a
3319 ft32/$(am__dirstamp):
3320         @$(MKDIR_P) ft32
3321         @: > ft32/$(am__dirstamp)
3322 ft32/$(DEPDIR)/$(am__dirstamp):
3323         @$(MKDIR_P) ft32/$(DEPDIR)
3324         @: > ft32/$(DEPDIR)/$(am__dirstamp)
3325 ft32/modules.$(OBJEXT): ft32/$(am__dirstamp) \
3326         ft32/$(DEPDIR)/$(am__dirstamp)
3327
3328 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3329         $(AM_V_at)-rm -f ft32/libsim.a
3330         $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3331         $(AM_V_at)$(RANLIB) ft32/libsim.a
3332 h8300/$(am__dirstamp):
3333         @$(MKDIR_P) h8300
3334         @: > h8300/$(am__dirstamp)
3335 h8300/$(DEPDIR)/$(am__dirstamp):
3336         @$(MKDIR_P) h8300/$(DEPDIR)
3337         @: > h8300/$(DEPDIR)/$(am__dirstamp)
3338 h8300/modules.$(OBJEXT): h8300/$(am__dirstamp) \
3339         h8300/$(DEPDIR)/$(am__dirstamp)
3340
3341 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3342         $(AM_V_at)-rm -f h8300/libsim.a
3343         $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3344         $(AM_V_at)$(RANLIB) h8300/libsim.a
3345 igen/$(am__dirstamp):
3346         @$(MKDIR_P) igen
3347         @: > igen/$(am__dirstamp)
3348 igen/$(DEPDIR)/$(am__dirstamp):
3349         @$(MKDIR_P) igen/$(DEPDIR)
3350         @: > igen/$(DEPDIR)/$(am__dirstamp)
3351 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3352         igen/$(DEPDIR)/$(am__dirstamp)
3353 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3354 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3355         igen/$(DEPDIR)/$(am__dirstamp)
3356 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3357         igen/$(DEPDIR)/$(am__dirstamp)
3358 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3359         igen/$(DEPDIR)/$(am__dirstamp)
3360 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3361         igen/$(DEPDIR)/$(am__dirstamp)
3362 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3363         igen/$(DEPDIR)/$(am__dirstamp)
3364 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3365         igen/$(DEPDIR)/$(am__dirstamp)
3366 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3367         igen/$(DEPDIR)/$(am__dirstamp)
3368 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3369         igen/$(DEPDIR)/$(am__dirstamp)
3370 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3371         igen/$(DEPDIR)/$(am__dirstamp)
3372 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3373         igen/$(DEPDIR)/$(am__dirstamp)
3374 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3375         igen/$(DEPDIR)/$(am__dirstamp)
3376 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3377         igen/$(DEPDIR)/$(am__dirstamp)
3378 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3379         igen/$(DEPDIR)/$(am__dirstamp)
3380 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3381         igen/$(DEPDIR)/$(am__dirstamp)
3382 iq2000/$(am__dirstamp):
3383         @$(MKDIR_P) iq2000
3384         @: > iq2000/$(am__dirstamp)
3385 iq2000/$(DEPDIR)/$(am__dirstamp):
3386         @$(MKDIR_P) iq2000/$(DEPDIR)
3387         @: > iq2000/$(DEPDIR)/$(am__dirstamp)
3388 iq2000/modules.$(OBJEXT): iq2000/$(am__dirstamp) \
3389         iq2000/$(DEPDIR)/$(am__dirstamp)
3390
3391 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3392         $(AM_V_at)-rm -f iq2000/libsim.a
3393         $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3394         $(AM_V_at)$(RANLIB) iq2000/libsim.a
3395 lm32/$(am__dirstamp):
3396         @$(MKDIR_P) lm32
3397         @: > lm32/$(am__dirstamp)
3398 lm32/$(DEPDIR)/$(am__dirstamp):
3399         @$(MKDIR_P) lm32/$(DEPDIR)
3400         @: > lm32/$(DEPDIR)/$(am__dirstamp)
3401 lm32/modules.$(OBJEXT): lm32/$(am__dirstamp) \
3402         lm32/$(DEPDIR)/$(am__dirstamp)
3403
3404 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3405         $(AM_V_at)-rm -f lm32/libsim.a
3406         $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3407         $(AM_V_at)$(RANLIB) lm32/libsim.a
3408 m32c/$(am__dirstamp):
3409         @$(MKDIR_P) m32c
3410         @: > m32c/$(am__dirstamp)
3411 m32c/$(DEPDIR)/$(am__dirstamp):
3412         @$(MKDIR_P) m32c/$(DEPDIR)
3413         @: > m32c/$(DEPDIR)/$(am__dirstamp)
3414 m32c/modules.$(OBJEXT): m32c/$(am__dirstamp) \
3415         m32c/$(DEPDIR)/$(am__dirstamp)
3416
3417 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3418         $(AM_V_at)-rm -f m32c/libsim.a
3419         $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3420         $(AM_V_at)$(RANLIB) m32c/libsim.a
3421 m32r/$(am__dirstamp):
3422         @$(MKDIR_P) m32r
3423         @: > m32r/$(am__dirstamp)
3424 m32r/$(DEPDIR)/$(am__dirstamp):
3425         @$(MKDIR_P) m32r/$(DEPDIR)
3426         @: > m32r/$(DEPDIR)/$(am__dirstamp)
3427 m32r/modules.$(OBJEXT): m32r/$(am__dirstamp) \
3428         m32r/$(DEPDIR)/$(am__dirstamp)
3429
3430 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3431         $(AM_V_at)-rm -f m32r/libsim.a
3432         $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3433         $(AM_V_at)$(RANLIB) m32r/libsim.a
3434 m68hc11/$(am__dirstamp):
3435         @$(MKDIR_P) m68hc11
3436         @: > m68hc11/$(am__dirstamp)
3437 m68hc11/$(DEPDIR)/$(am__dirstamp):
3438         @$(MKDIR_P) m68hc11/$(DEPDIR)
3439         @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3440 m68hc11/modules.$(OBJEXT): m68hc11/$(am__dirstamp) \
3441         m68hc11/$(DEPDIR)/$(am__dirstamp)
3442
3443 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3444         $(AM_V_at)-rm -f m68hc11/libsim.a
3445         $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3446         $(AM_V_at)$(RANLIB) m68hc11/libsim.a
3447 mcore/$(am__dirstamp):
3448         @$(MKDIR_P) mcore
3449         @: > mcore/$(am__dirstamp)
3450 mcore/$(DEPDIR)/$(am__dirstamp):
3451         @$(MKDIR_P) mcore/$(DEPDIR)
3452         @: > mcore/$(DEPDIR)/$(am__dirstamp)
3453 mcore/modules.$(OBJEXT): mcore/$(am__dirstamp) \
3454         mcore/$(DEPDIR)/$(am__dirstamp)
3455
3456 mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3457         $(AM_V_at)-rm -f mcore/libsim.a
3458         $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3459         $(AM_V_at)$(RANLIB) mcore/libsim.a
3460 microblaze/$(am__dirstamp):
3461         @$(MKDIR_P) microblaze
3462         @: > microblaze/$(am__dirstamp)
3463 microblaze/$(DEPDIR)/$(am__dirstamp):
3464         @$(MKDIR_P) microblaze/$(DEPDIR)
3465         @: > microblaze/$(DEPDIR)/$(am__dirstamp)
3466 microblaze/modules.$(OBJEXT): microblaze/$(am__dirstamp) \
3467         microblaze/$(DEPDIR)/$(am__dirstamp)
3468
3469 microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3470         $(AM_V_at)-rm -f microblaze/libsim.a
3471         $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3472         $(AM_V_at)$(RANLIB) microblaze/libsim.a
3473 mips/$(am__dirstamp):
3474         @$(MKDIR_P) mips
3475         @: > mips/$(am__dirstamp)
3476 mips/$(DEPDIR)/$(am__dirstamp):
3477         @$(MKDIR_P) mips/$(DEPDIR)
3478         @: > mips/$(DEPDIR)/$(am__dirstamp)
3479 mips/modules.$(OBJEXT): mips/$(am__dirstamp) \
3480         mips/$(DEPDIR)/$(am__dirstamp)
3481
3482 mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3483         $(AM_V_at)-rm -f mips/libsim.a
3484         $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3485         $(AM_V_at)$(RANLIB) mips/libsim.a
3486 mn10300/$(am__dirstamp):
3487         @$(MKDIR_P) mn10300
3488         @: > mn10300/$(am__dirstamp)
3489 mn10300/$(DEPDIR)/$(am__dirstamp):
3490         @$(MKDIR_P) mn10300/$(DEPDIR)
3491         @: > mn10300/$(DEPDIR)/$(am__dirstamp)
3492 mn10300/modules.$(OBJEXT): mn10300/$(am__dirstamp) \
3493         mn10300/$(DEPDIR)/$(am__dirstamp)
3494
3495 mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3496         $(AM_V_at)-rm -f mn10300/libsim.a
3497         $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3498         $(AM_V_at)$(RANLIB) mn10300/libsim.a
3499 moxie/$(am__dirstamp):
3500         @$(MKDIR_P) moxie
3501         @: > moxie/$(am__dirstamp)
3502 moxie/$(DEPDIR)/$(am__dirstamp):
3503         @$(MKDIR_P) moxie/$(DEPDIR)
3504         @: > moxie/$(DEPDIR)/$(am__dirstamp)
3505 moxie/modules.$(OBJEXT): moxie/$(am__dirstamp) \
3506         moxie/$(DEPDIR)/$(am__dirstamp)
3507
3508 moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3509         $(AM_V_at)-rm -f moxie/libsim.a
3510         $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3511         $(AM_V_at)$(RANLIB) moxie/libsim.a
3512 msp430/$(am__dirstamp):
3513         @$(MKDIR_P) msp430
3514         @: > msp430/$(am__dirstamp)
3515 msp430/$(DEPDIR)/$(am__dirstamp):
3516         @$(MKDIR_P) msp430/$(DEPDIR)
3517         @: > msp430/$(DEPDIR)/$(am__dirstamp)
3518 msp430/modules.$(OBJEXT): msp430/$(am__dirstamp) \
3519         msp430/$(DEPDIR)/$(am__dirstamp)
3520
3521 msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3522         $(AM_V_at)-rm -f msp430/libsim.a
3523         $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3524         $(AM_V_at)$(RANLIB) msp430/libsim.a
3525 or1k/$(am__dirstamp):
3526         @$(MKDIR_P) or1k
3527         @: > or1k/$(am__dirstamp)
3528 or1k/$(DEPDIR)/$(am__dirstamp):
3529         @$(MKDIR_P) or1k/$(DEPDIR)
3530         @: > or1k/$(DEPDIR)/$(am__dirstamp)
3531 or1k/modules.$(OBJEXT): or1k/$(am__dirstamp) \
3532         or1k/$(DEPDIR)/$(am__dirstamp)
3533
3534 or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3535         $(AM_V_at)-rm -f or1k/libsim.a
3536         $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3537         $(AM_V_at)$(RANLIB) or1k/libsim.a
3538 pru/$(am__dirstamp):
3539         @$(MKDIR_P) pru
3540         @: > pru/$(am__dirstamp)
3541 pru/$(DEPDIR)/$(am__dirstamp):
3542         @$(MKDIR_P) pru/$(DEPDIR)
3543         @: > pru/$(DEPDIR)/$(am__dirstamp)
3544 pru/modules.$(OBJEXT): pru/$(am__dirstamp) \
3545         pru/$(DEPDIR)/$(am__dirstamp)
3546
3547 pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3548         $(AM_V_at)-rm -f pru/libsim.a
3549         $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3550         $(AM_V_at)$(RANLIB) pru/libsim.a
3551 riscv/$(am__dirstamp):
3552         @$(MKDIR_P) riscv
3553         @: > riscv/$(am__dirstamp)
3554 riscv/$(DEPDIR)/$(am__dirstamp):
3555         @$(MKDIR_P) riscv/$(DEPDIR)
3556         @: > riscv/$(DEPDIR)/$(am__dirstamp)
3557 riscv/modules.$(OBJEXT): riscv/$(am__dirstamp) \
3558         riscv/$(DEPDIR)/$(am__dirstamp)
3559
3560 riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3561         $(AM_V_at)-rm -f riscv/libsim.a
3562         $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3563         $(AM_V_at)$(RANLIB) riscv/libsim.a
3564 rl78/$(am__dirstamp):
3565         @$(MKDIR_P) rl78
3566         @: > rl78/$(am__dirstamp)
3567 rl78/$(DEPDIR)/$(am__dirstamp):
3568         @$(MKDIR_P) rl78/$(DEPDIR)
3569         @: > rl78/$(DEPDIR)/$(am__dirstamp)
3570 rl78/modules.$(OBJEXT): rl78/$(am__dirstamp) \
3571         rl78/$(DEPDIR)/$(am__dirstamp)
3572
3573 rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3574         $(AM_V_at)-rm -f rl78/libsim.a
3575         $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3576         $(AM_V_at)$(RANLIB) rl78/libsim.a
3577 rx/$(am__dirstamp):
3578         @$(MKDIR_P) rx
3579         @: > rx/$(am__dirstamp)
3580 rx/$(DEPDIR)/$(am__dirstamp):
3581         @$(MKDIR_P) rx/$(DEPDIR)
3582         @: > rx/$(DEPDIR)/$(am__dirstamp)
3583 rx/modules.$(OBJEXT): rx/$(am__dirstamp) rx/$(DEPDIR)/$(am__dirstamp)
3584
3585 rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
3586         $(AM_V_at)-rm -f rx/libsim.a
3587         $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
3588         $(AM_V_at)$(RANLIB) rx/libsim.a
3589 sh/$(am__dirstamp):
3590         @$(MKDIR_P) sh
3591         @: > sh/$(am__dirstamp)
3592 sh/$(DEPDIR)/$(am__dirstamp):
3593         @$(MKDIR_P) sh/$(DEPDIR)
3594         @: > sh/$(DEPDIR)/$(am__dirstamp)
3595 sh/modules.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3596
3597 sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
3598         $(AM_V_at)-rm -f sh/libsim.a
3599         $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
3600         $(AM_V_at)$(RANLIB) sh/libsim.a
3601 v850/$(am__dirstamp):
3602         @$(MKDIR_P) v850
3603         @: > v850/$(am__dirstamp)
3604 v850/$(DEPDIR)/$(am__dirstamp):
3605         @$(MKDIR_P) v850/$(DEPDIR)
3606         @: > v850/$(DEPDIR)/$(am__dirstamp)
3607 v850/modules.$(OBJEXT): v850/$(am__dirstamp) \
3608         v850/$(DEPDIR)/$(am__dirstamp)
3609
3610 v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
3611         $(AM_V_at)-rm -f v850/libsim.a
3612         $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
3613         $(AM_V_at)$(RANLIB) v850/libsim.a
3614
3615 clean-checkPROGRAMS:
3616         @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3617         echo " rm -f" $$list; \
3618         rm -f $$list || exit $$?; \
3619         test -n "$(EXEEXT)" || exit 0; \
3620         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3621         echo " rm -f" $$list; \
3622         rm -f $$list
3623
3624 clean-noinstPROGRAMS:
3625         @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3626         echo " rm -f" $$list; \
3627         rm -f $$list || exit $$?; \
3628         test -n "$(EXEEXT)" || exit 0; \
3629         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3630         echo " rm -f" $$list; \
3631         rm -f $$list
3632
3633 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3634         @rm -f aarch64/run$(EXEEXT)
3635         $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
3636
3637 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3638         @rm -f arm/run$(EXEEXT)
3639         $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
3640
3641 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3642         @rm -f avr/run$(EXEEXT)
3643         $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
3644
3645 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3646         @rm -f bfin/run$(EXEEXT)
3647         $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
3648
3649 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3650         @rm -f bpf/run$(EXEEXT)
3651         $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
3652 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3653         cr16/$(DEPDIR)/$(am__dirstamp)
3654
3655 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3656 @SIM_ENABLE_ARCH_cr16_FALSE@    @rm -f cr16/gencode$(EXEEXT)
3657 @SIM_ENABLE_ARCH_cr16_FALSE@    $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
3658
3659 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3660         @rm -f cr16/run$(EXEEXT)
3661         $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
3662
3663 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3664         @rm -f cris/run$(EXEEXT)
3665         $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
3666 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3667         cris/$(DEPDIR)/$(am__dirstamp)
3668
3669 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3670         @rm -f cris/rvdummy$(EXEEXT)
3671         $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
3672 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3673         d10v/$(DEPDIR)/$(am__dirstamp)
3674
3675 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3676 @SIM_ENABLE_ARCH_d10v_FALSE@    @rm -f d10v/gencode$(EXEEXT)
3677 @SIM_ENABLE_ARCH_d10v_FALSE@    $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
3678
3679 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3680         @rm -f d10v/run$(EXEEXT)
3681         $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
3682
3683 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3684         @rm -f erc32/run$(EXEEXT)
3685         $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3686 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3687         erc32/$(DEPDIR)/$(am__dirstamp)
3688
3689 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3690 @SIM_ENABLE_ARCH_erc32_FALSE@   @rm -f erc32/sis$(EXEEXT)
3691 @SIM_ENABLE_ARCH_erc32_FALSE@   $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3692
3693 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3694         @rm -f example-synacor/run$(EXEEXT)
3695         $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3696
3697 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3698         @rm -f frv/run$(EXEEXT)
3699         $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3700
3701 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3702         @rm -f ft32/run$(EXEEXT)
3703         $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3704
3705 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3706         @rm -f h8300/run$(EXEEXT)
3707         $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3708
3709 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3710         @rm -f igen/filter$(EXEEXT)
3711         $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3712
3713 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3714         @rm -f igen/gen$(EXEEXT)
3715         $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3716 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3717         igen/$(DEPDIR)/$(am__dirstamp)
3718
3719 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3720         @rm -f igen/ld-cache$(EXEEXT)
3721         $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3722
3723 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3724         @rm -f igen/ld-decode$(EXEEXT)
3725         $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3726
3727 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3728         @rm -f igen/ld-insn$(EXEEXT)
3729         $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3730
3731 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3732         @rm -f igen/table$(EXEEXT)
3733         $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3734
3735 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3736         @rm -f iq2000/run$(EXEEXT)
3737         $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3738
3739 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3740         @rm -f lm32/run$(EXEEXT)
3741         $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3742 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3743         m32c/$(DEPDIR)/$(am__dirstamp)
3744
3745 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3746 @SIM_ENABLE_ARCH_m32c_FALSE@    @rm -f m32c/opc2c$(EXEEXT)
3747 @SIM_ENABLE_ARCH_m32c_FALSE@    $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3748
3749 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3750         @rm -f m32c/run$(EXEEXT)
3751         $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3752
3753 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3754         @rm -f m32r/run$(EXEEXT)
3755         $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3756 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3757         m68hc11/$(DEPDIR)/$(am__dirstamp)
3758
3759 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3760 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3761 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3762
3763 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3764         @rm -f m68hc11/run$(EXEEXT)
3765         $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3766
3767 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3768         @rm -f mcore/run$(EXEEXT)
3769         $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
3770
3771 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3772         @rm -f microblaze/run$(EXEEXT)
3773         $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
3774
3775 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3776         @rm -f mips/run$(EXEEXT)
3777         $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
3778
3779 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3780         @rm -f mn10300/run$(EXEEXT)
3781         $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
3782
3783 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3784         @rm -f moxie/run$(EXEEXT)
3785         $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
3786
3787 msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
3788         @rm -f msp430/run$(EXEEXT)
3789         $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
3790
3791 or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
3792         @rm -f or1k/run$(EXEEXT)
3793         $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
3794 ppc/$(am__dirstamp):
3795         @$(MKDIR_P) ppc
3796         @: > ppc/$(am__dirstamp)
3797
3798 ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
3799         @rm -f ppc/run$(EXEEXT)
3800         $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
3801
3802 pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
3803         @rm -f pru/run$(EXEEXT)
3804         $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS)
3805
3806 riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
3807         @rm -f riscv/run$(EXEEXT)
3808         $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
3809
3810 rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
3811         @rm -f rl78/run$(EXEEXT)
3812         $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
3813
3814 rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
3815         @rm -f rx/run$(EXEEXT)
3816         $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
3817 sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3818
3819 @SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
3820 @SIM_ENABLE_ARCH_sh_FALSE@      @rm -f sh/gencode$(EXEEXT)
3821 @SIM_ENABLE_ARCH_sh_FALSE@      $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS)
3822
3823 sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
3824         @rm -f sh/run$(EXEEXT)
3825         $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS)
3826 testsuite/common/$(am__dirstamp):
3827         @$(MKDIR_P) testsuite/common
3828         @: > testsuite/common/$(am__dirstamp)
3829 testsuite/common/$(DEPDIR)/$(am__dirstamp):
3830         @$(MKDIR_P) testsuite/common/$(DEPDIR)
3831         @: > testsuite/common/$(DEPDIR)/$(am__dirstamp)
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3833         testsuite/common/$(DEPDIR)/$(am__dirstamp)
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3835         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3836 testsuite/common/bits32m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3837         testsuite/common/$(DEPDIR)/$(am__dirstamp)
3838 testsuite/common/bits32m31.$(OBJEXT):  \
3839         testsuite/common/$(am__dirstamp) \
3840         testsuite/common/$(DEPDIR)/$(am__dirstamp)
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3849 v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
3850         @rm -f v850/run$(EXEEXT)
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3853 mostlyclean-compile:
3854         -rm -f *.$(OBJEXT)
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3856         -rm -f arm/*.$(OBJEXT)
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3858         -rm -f bfin/*.$(OBJEXT)
3859         -rm -f bpf/*.$(OBJEXT)
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3861         -rm -f cr16/*.$(OBJEXT)
3862         -rm -f cris/*.$(OBJEXT)
3863         -rm -f d10v/*.$(OBJEXT)
3864         -rm -f erc32/*.$(OBJEXT)
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3866         -rm -f frv/*.$(OBJEXT)
3867         -rm -f ft32/*.$(OBJEXT)
3868         -rm -f h8300/*.$(OBJEXT)
3869         -rm -f igen/*.$(OBJEXT)
3870         -rm -f iq2000/*.$(OBJEXT)
3871         -rm -f lm32/*.$(OBJEXT)
3872         -rm -f m32c/*.$(OBJEXT)
3873         -rm -f m32r/*.$(OBJEXT)
3874         -rm -f m68hc11/*.$(OBJEXT)
3875         -rm -f mcore/*.$(OBJEXT)
3876         -rm -f microblaze/*.$(OBJEXT)
3877         -rm -f mips/*.$(OBJEXT)
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3879         -rm -f moxie/*.$(OBJEXT)
3880         -rm -f msp430/*.$(OBJEXT)
3881         -rm -f or1k/*.$(OBJEXT)
3882         -rm -f pru/*.$(OBJEXT)
3883         -rm -f riscv/*.$(OBJEXT)
3884         -rm -f rl78/*.$(OBJEXT)
3885         -rm -f rx/*.$(OBJEXT)
3886         -rm -f sh/*.$(OBJEXT)
3887         -rm -f testsuite/common/*.$(OBJEXT)
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3890 distclean-compile:
3891         -rm -f *.tab.c
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3894 @AMDEP_TRUE@@am__include@ @am__quote@arm/$(DEPDIR)/modules.Po@am__quote@
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4270 CTAGS: ctags
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4274           || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
4275              $$unique
4276
4277 GTAGS:
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4279           && $(am__cd) $(top_srcdir) \
4280           && gtags -i $(GTAGS_ARGS) "$$here"
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4283           || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
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4285         -rm -f cscope.files
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4287 cscopelist: cscopelist-recursive
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4289 cscopelist-am: $(am__tagged_files)
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4297             echo "$(subdir)/$$i"; \
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4299             echo "$$sdir/$$i"; \
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4301         done >> $(top_builddir)/cscope.files
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4303 distclean-tags:
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4305         -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
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4310         @echo '# edit the last section' >>site.tmp
4311         @echo 'set srcdir "$(srcdir)"' >>site.tmp
4312         @echo "set objdir `pwd`" >>site.tmp
4313         @echo 'set build_alias "$(build_alias)"' >>site.tmp
4314         @echo 'set build_triplet $(build_triplet)' >>site.tmp
4315         @echo 'set host_alias "$(host_alias)"' >>site.tmp
4316         @echo 'set host_triplet $(host_triplet)' >>site.tmp
4317         @echo 'set target_alias "$(target_alias)"' >>site.tmp
4318         @echo 'set target_triplet $(target_triplet)' >>site.tmp
4319         @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
4320           echo "## Begin content included from file $$f.  Do not modify. ##" \
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4322            && echo "## End content included from file $$f. ##" \
4323            || exit 1; \
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4325         @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
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4329         @-rm -f site.bak
4330         @test ! -f site.exp || mv site.exp site.bak
4331         @mv site.tmp site.exp
4332
4333 distclean-DEJAGNU:
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4335         -l='$(DEJATOOL)'; for tool in $$l; do \
4336           rm -f $$tool.sum $$tool.log; \
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4338
4339 # Recover from deleted '.trs' file; this should ensure that
4340 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
4341 # both 'foo.log' and 'foo.trs'.  Break the recipe in two subshells
4342 # to avoid problems with "make -n".
4343 .log.trs:
4344         rm -f $< $@
4345         $(MAKE) $(AM_MAKEFLAGS) $<
4346
4347 # Leading 'am--fnord' is there to ensure the list of targets does not
4348 # expand to empty, as could happen e.g. with make check TESTS=''.
4349 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
4350 am--force-recheck:
4351         @:
4352
4353 $(TEST_SUITE_LOG): $(TEST_LOGS)
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4360           redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
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4370           am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
4371         fi; \
4372         if $(am__make_dryrun); then :; else \
4373           st=0;  \
4374           errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
4375           for i in $$redo_bases; do \
4376             test -f $$i.trs && test -r $$i.trs \
4377               || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
4378             test -f $$i.log && test -r $$i.log \
4379               || { echo "$$errmsg $$i.log" >&2; st=1; }; \
4380           done; \
4381           test $$st -eq 0 || exit 1; \
4382         fi
4383         @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
4384         ws='[   ]'; \
4385         results=`for b in $$bases; do echo $$b.trs; done`; \
4386         test -n "$$results" || results=/dev/null; \
4387         all=`  grep "^$$ws*:test-result:"           $$results | wc -l`; \
4388         pass=` grep "^$$ws*:test-result:$$ws*PASS"  $$results | wc -l`; \
4389         fail=` grep "^$$ws*:test-result:$$ws*FAIL"  $$results | wc -l`; \
4390         skip=` grep "^$$ws*:test-result:$$ws*SKIP"  $$results | wc -l`; \
4391         xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
4392         xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
4393         error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
4394         if test `expr $$fail + $$xpass + $$error` -eq 0; then \
4395           success=true; \
4396         else \
4397           success=false; \
4398         fi; \
4399         br='==================='; br=$$br$$br$$br$$br; \
4400         result_count () \
4401         { \
4402             if test x"$$1" = x"--maybe-color"; then \
4403               maybe_colorize=yes; \
4404             elif test x"$$1" = x"--no-color"; then \
4405               maybe_colorize=no; \
4406             else \
4407               echo "$@: invalid 'result_count' usage" >&2; exit 4; \
4408             fi; \
4409             shift; \
4410             desc=$$1 count=$$2; \
4411             if test $$maybe_colorize = yes && test $$count -gt 0; then \
4412               color_start=$$3 color_end=$$std; \
4413             else \
4414               color_start= color_end=; \
4415             fi; \
4416             echo "$${color_start}# $$desc $$count$${color_end}"; \
4417         }; \
4418         create_testsuite_report () \
4419         { \
4420           result_count $$1 "TOTAL:" $$all   "$$brg"; \
4421           result_count $$1 "PASS: " $$pass  "$$grn"; \
4422           result_count $$1 "SKIP: " $$skip  "$$blu"; \
4423           result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
4424           result_count $$1 "FAIL: " $$fail  "$$red"; \
4425           result_count $$1 "XPASS:" $$xpass "$$red"; \
4426           result_count $$1 "ERROR:" $$error "$$mgn"; \
4427         }; \
4428         {                                                               \
4429           echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" |       \
4430             $(am__rst_title);                                           \
4431           create_testsuite_report --no-color;                           \
4432           echo;                                                         \
4433           echo ".. contents:: :depth: 2";                               \
4434           echo;                                                         \
4435           for b in $$bases; do echo $$b; done                           \
4436             | $(am__create_global_log);                                 \
4437         } >$(TEST_SUITE_LOG).tmp || exit 1;                             \
4438         mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG);                     \
4439         if $$success; then                                              \
4440           col="$$grn";                                                  \
4441          else                                                           \
4442           col="$$red";                                                  \
4443           test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG);               \
4444         fi;                                                             \
4445         echo "$${col}$$br$${std}";                                      \
4446         echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}";   \
4447         echo "$${col}$$br$${std}";                                      \
4448         create_testsuite_report --maybe-color;                          \
4449         echo "$$col$$br$$std";                                          \
4450         if $$success; then :; else                                      \
4451           echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}";         \
4452           if test -n "$(PACKAGE_BUGREPORT)"; then                       \
4453             echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
4454           fi;                                                           \
4455           echo "$$col$$br$$std";                                        \
4456         fi;                                                             \
4457         $$success || exit 1
4458
4459 check-TESTS:
4460         @list='$(RECHECK_LOGS)';           test -z "$$list" || rm -f $$list
4461         @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
4462         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4463         @set +e; $(am__set_TESTS_bases); \
4464         log_list=`for i in $$bases; do echo $$i.log; done`; \
4465         trs_list=`for i in $$bases; do echo $$i.trs; done`; \
4466         log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4467         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4468         exit $$?;
4469 recheck: all $(check_PROGRAMS)
4470         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4471         @set +e; $(am__set_TESTS_bases); \
4472         bases=`for i in $$bases; do echo $$i; done \
4473                  | $(am__list_recheck_tests)` || exit 1; \
4474         log_list=`for i in $$bases; do echo $$i.log; done`; \
4475         log_list=`echo $$log_list`; \
4476         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4477                 am__force_recheck=am--force-recheck \
4478                 TEST_LOGS="$$log_list"; \
4479         exit $$?
4480 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
4481         @p='testsuite/common/bits32m0$(EXEEXT)'; \
4482         b='testsuite/common/bits32m0'; \
4483         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4484         --log-file $$b.log --trs-file $$b.trs \
4485         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4486         "$$tst" $(AM_TESTS_FD_REDIRECT)
4487 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
4488         @p='testsuite/common/bits32m31$(EXEEXT)'; \
4489         b='testsuite/common/bits32m31'; \
4490         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4491         --log-file $$b.log --trs-file $$b.trs \
4492         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4493         "$$tst" $(AM_TESTS_FD_REDIRECT)
4494 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
4495         @p='testsuite/common/bits64m0$(EXEEXT)'; \
4496         b='testsuite/common/bits64m0'; \
4497         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4498         --log-file $$b.log --trs-file $$b.trs \
4499         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4500         "$$tst" $(AM_TESTS_FD_REDIRECT)
4501 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
4502         @p='testsuite/common/bits64m63$(EXEEXT)'; \
4503         b='testsuite/common/bits64m63'; \
4504         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4505         --log-file $$b.log --trs-file $$b.trs \
4506         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4507         "$$tst" $(AM_TESTS_FD_REDIRECT)
4508 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
4509         @p='testsuite/common/alu-tst$(EXEEXT)'; \
4510         b='testsuite/common/alu-tst'; \
4511         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4512         --log-file $$b.log --trs-file $$b.trs \
4513         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4514         "$$tst" $(AM_TESTS_FD_REDIRECT)
4515 .test.log:
4516         @p='$<'; \
4517         $(am__set_b); \
4518         $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4519         --log-file $$b.log --trs-file $$b.trs \
4520         $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4521         "$$tst" $(AM_TESTS_FD_REDIRECT)
4522 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
4523 @am__EXEEXT_TRUE@       @p='$<'; \
4524 @am__EXEEXT_TRUE@       $(am__set_b); \
4525 @am__EXEEXT_TRUE@       $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4526 @am__EXEEXT_TRUE@       --log-file $$b.log --trs-file $$b.trs \
4527 @am__EXEEXT_TRUE@       $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4528 @am__EXEEXT_TRUE@       "$$tst" $(AM_TESTS_FD_REDIRECT)
4529 check-am: all-am
4530         $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
4531         $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
4532 check: $(BUILT_SOURCES)
4533         $(MAKE) $(AM_MAKEFLAGS) check-recursive
4534 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
4535 installdirs: installdirs-recursive
4536 installdirs-am:
4537         for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
4538           test -z "$$dir" || $(MKDIR_P) "$$dir"; \
4539         done
4540 install: $(BUILT_SOURCES)
4541         $(MAKE) $(AM_MAKEFLAGS) install-recursive
4542 install-exec: install-exec-recursive
4543 install-data: install-data-recursive
4544 uninstall: uninstall-recursive
4545
4546 install-am: all-am
4547         @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4548
4549 installcheck: installcheck-recursive
4550 install-strip:
4551         if test -z '$(STRIP)'; then \
4552           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4553             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4554               install; \
4555         else \
4556           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4557             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4558             "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4559         fi
4560 mostlyclean-generic:
4561         -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
4562         -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
4563         -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
4564         -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4565
4566 clean-generic:
4567         -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
4568
4569 distclean-generic:
4570         -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
4571         -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
4572         -rm -f aarch64/$(DEPDIR)/$(am__dirstamp)
4573         -rm -f aarch64/$(am__dirstamp)
4574         -rm -f arm/$(DEPDIR)/$(am__dirstamp)
4575         -rm -f arm/$(am__dirstamp)
4576         -rm -f avr/$(DEPDIR)/$(am__dirstamp)
4577         -rm -f avr/$(am__dirstamp)
4578         -rm -f bfin/$(DEPDIR)/$(am__dirstamp)
4579         -rm -f bfin/$(am__dirstamp)
4580         -rm -f bpf/$(DEPDIR)/$(am__dirstamp)
4581         -rm -f bpf/$(am__dirstamp)
4582         -rm -f common/$(DEPDIR)/$(am__dirstamp)
4583         -rm -f common/$(am__dirstamp)
4584         -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
4585         -rm -f cr16/$(am__dirstamp)
4586         -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4587         -rm -f cris/$(am__dirstamp)
4588         -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4589         -rm -f d10v/$(am__dirstamp)
4590         -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4591         -rm -f erc32/$(am__dirstamp)
4592         -rm -f example-synacor/$(DEPDIR)/$(am__dirstamp)
4593         -rm -f example-synacor/$(am__dirstamp)
4594         -rm -f frv/$(DEPDIR)/$(am__dirstamp)
4595         -rm -f frv/$(am__dirstamp)
4596         -rm -f ft32/$(DEPDIR)/$(am__dirstamp)
4597         -rm -f ft32/$(am__dirstamp)
4598         -rm -f h8300/$(DEPDIR)/$(am__dirstamp)
4599         -rm -f h8300/$(am__dirstamp)
4600         -rm -f igen/$(DEPDIR)/$(am__dirstamp)
4601         -rm -f igen/$(am__dirstamp)
4602         -rm -f iq2000/$(DEPDIR)/$(am__dirstamp)
4603         -rm -f iq2000/$(am__dirstamp)
4604         -rm -f lm32/$(DEPDIR)/$(am__dirstamp)
4605         -rm -f lm32/$(am__dirstamp)
4606         -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
4607         -rm -f m32c/$(am__dirstamp)
4608         -rm -f m32r/$(DEPDIR)/$(am__dirstamp)
4609         -rm -f m32r/$(am__dirstamp)
4610         -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
4611         -rm -f m68hc11/$(am__dirstamp)
4612         -rm -f mcore/$(DEPDIR)/$(am__dirstamp)
4613         -rm -f mcore/$(am__dirstamp)
4614         -rm -f microblaze/$(DEPDIR)/$(am__dirstamp)
4615         -rm -f microblaze/$(am__dirstamp)
4616         -rm -f mips/$(DEPDIR)/$(am__dirstamp)
4617         -rm -f mips/$(am__dirstamp)
4618         -rm -f mn10300/$(DEPDIR)/$(am__dirstamp)
4619         -rm -f mn10300/$(am__dirstamp)
4620         -rm -f moxie/$(DEPDIR)/$(am__dirstamp)
4621         -rm -f moxie/$(am__dirstamp)
4622         -rm -f msp430/$(DEPDIR)/$(am__dirstamp)
4623         -rm -f msp430/$(am__dirstamp)
4624         -rm -f or1k/$(DEPDIR)/$(am__dirstamp)
4625         -rm -f or1k/$(am__dirstamp)
4626         -rm -f ppc/$(am__dirstamp)
4627         -rm -f pru/$(DEPDIR)/$(am__dirstamp)
4628         -rm -f pru/$(am__dirstamp)
4629         -rm -f riscv/$(DEPDIR)/$(am__dirstamp)
4630         -rm -f riscv/$(am__dirstamp)
4631         -rm -f rl78/$(DEPDIR)/$(am__dirstamp)
4632         -rm -f rl78/$(am__dirstamp)
4633         -rm -f rx/$(DEPDIR)/$(am__dirstamp)
4634         -rm -f rx/$(am__dirstamp)
4635         -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4636         -rm -f sh/$(am__dirstamp)
4637         -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4638         -rm -f testsuite/common/$(am__dirstamp)
4639         -rm -f v850/$(DEPDIR)/$(am__dirstamp)
4640         -rm -f v850/$(am__dirstamp)
4641         -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
4642
4643 maintainer-clean-generic:
4644         @echo "This command is intended for maintainers to use"
4645         @echo "it deletes files that may require special tools to rebuild."
4646         -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
4647 clean: clean-recursive
4648
4649 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
4650         clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
4651
4652 distclean: distclean-recursive
4653         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4654         -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR)
4655         -rm -f Makefile
4656 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
4657         distclean-generic distclean-hdr distclean-libtool \
4658         distclean-tags
4659
4660 dvi: dvi-recursive
4661
4662 dvi-am:
4663
4664 html: html-recursive
4665
4666 html-am:
4667
4668 info: info-recursive
4669
4670 info-am:
4671
4672 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
4673         install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
4674         install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
4675
4676 install-dvi: install-dvi-recursive
4677
4678 install-dvi-am:
4679
4680 install-exec-am: install-exec-local
4681
4682 install-html: install-html-recursive
4683
4684 install-html-am:
4685
4686 install-info: install-info-recursive
4687
4688 install-info-am:
4689
4690 install-man:
4691
4692 install-pdf: install-pdf-recursive
4693
4694 install-pdf-am:
4695
4696 install-ps: install-ps-recursive
4697
4698 install-ps-am:
4699
4700 installcheck-am:
4701
4702 maintainer-clean: maintainer-clean-recursive
4703         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4704         -rm -rf $(top_srcdir)/autom4te.cache
4705         -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR)
4706         -rm -f Makefile
4707 maintainer-clean-am: distclean-am maintainer-clean-generic
4708
4709 mostlyclean: mostlyclean-recursive
4710
4711 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4712         mostlyclean-libtool
4713
4714 pdf: pdf-recursive
4715
4716 pdf-am:
4717
4718 ps: ps-recursive
4719
4720 ps-am:
4721
4722 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4723         uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4724         uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4725         uninstall-ppcdocDATA uninstall-rxdocDATA
4726
4727 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4728         install-strip
4729
4730 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4731         am--refresh check check-DEJAGNU check-TESTS check-am clean \
4732         clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4733         clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4734         cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4735         distclean-compile distclean-generic distclean-hdr \
4736         distclean-libtool distclean-tags dvi dvi-am html html-am info \
4737         info-am install install-am install-armdocDATA install-data \
4738         install-data-am install-data-local install-dtbDATA install-dvi \
4739         install-dvi-am install-erc32docDATA install-exec \
4740         install-exec-am install-exec-local install-frvdocDATA \
4741         install-html install-html-am install-info install-info-am \
4742         install-man install-or1kdocDATA install-pdf install-pdf-am \
4743         install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4744         install-ps-am install-rxdocDATA install-strip installcheck \
4745         installcheck-am installdirs installdirs-am maintainer-clean \
4746         maintainer-clean-generic mostlyclean mostlyclean-compile \
4747         mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4748         recheck tags tags-am uninstall uninstall-am \
4749         uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4750         uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4751         uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4752         uninstall-rxdocDATA
4753
4754 .PRECIOUS: Makefile
4755
4756 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4757
4758 # Generate target constants for newlib/libgloss from its source tree.
4759 # This file is shipped with distributions so we build in the source dir.
4760 # Use `make nltvals' to rebuild.
4761 .PHONY: nltvals
4762 nltvals:
4763         $(srccom)/gennltvals.py --cpp "$(CPP)"
4764
4765 common/version.c: common/version.c-stamp ; @true
4766 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4767         $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4768         $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4769         $(AM_V_at)touch $@
4770
4771 .PRECIOUS: %/test-hw-events.o
4772 %/test-hw-events.o: common/hw-events.c
4773         $(AM_V_CC)$(COMPILE) -DMAIN -c -o $@ $<
4774 %/test-hw-events: %/test-hw-events.o %/libsim.a
4775         $(AM_V_CCLD)$(LINK) -o $@ $^ $(SIM_COMMON_LIBS) $(LIBS)
4776
4777 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4778 %/hw-config.h: %/stamp-hw ; @true
4779 %/stamp-hw: Makefile
4780         $(AM_V_GEN)set -e; \
4781         ( \
4782         sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4783         echo "/* generated by Makefile */" ; \
4784         printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4785         echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4786         printf "  dv_%s_descriptor,\n" $$sim_hw ; \
4787         echo "  NULL," ; \
4788         echo "};" \
4789         ) > $@.tmp; \
4790         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4791         touch $@
4792 .PRECIOUS: %/stamp-hw
4793 %/modules.c: %/stamp-modules ; @true
4794 %/stamp-modules: Makefile
4795         $(AM_V_GEN)set -e; \
4796         LANG=C ; export LANG; \
4797         LC_ALL=C ; export LC_ALL; \
4798         sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \
4799         ( \
4800         echo '/* Do not modify this file.  */'; \
4801         echo '/* It is created automatically by the Makefile.  */'; \
4802         echo '#include "libiberty.h"'; \
4803         echo '#include "sim-module.h"'; \
4804         sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
4805         echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4806         sed -e 's:\(.*\):  \1,:' $@.l-tmp; \
4807         echo '};'; \
4808         echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4809         ) >$@.tmp; \
4810         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \
4811         rm -f $@.l-tmp; \
4812         touch $@
4813 .PRECIOUS: %/stamp-modules
4814
4815 # Alias for developers.
4816 igen: $(IGEN)
4817
4818 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4819 igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4820         $(AM_V_at)-rm -f $@
4821         $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4822         $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4823
4824 igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4825         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4826
4827 # igen is a build-time only tool.  Override the default rules for it.
4828 igen/%.o: igen/%.c
4829         $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4830
4831 # Build some of the files in standalone mode for developers of igen itself.
4832 igen/%-main.o: igen/%.c
4833         $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4834
4835 site-sim-config.exp: Makefile
4836         $(AM_V_GEN)( \
4837         echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4838         echo "set builddir \"$(builddir)\""; \
4839         echo "set srcdir \"$(srcdir)/testsuite\""; \
4840         $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4841         ) > $@
4842
4843 # Ignore dirs that only contain configuration settings.
4844 check/./config/%.exp: ; @true
4845 check/config/%.exp: ; @true
4846 check/./lib/%.exp: ; @true
4847 check/lib/%.exp: ; @true
4848
4849 check/%.exp:
4850         $(AM_V_at)mkdir -p testsuite/$*
4851         $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4852
4853 check-DEJAGNU-parallel:
4854         $(AM_V_at)( \
4855         set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4856         $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4857         ret=$$?; \
4858         set -- `printf 'testsuite/%s/ ' $$@`; \
4859         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4860           `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4861         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4862           `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4863         echo; \
4864         $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4865         exit $$ret)
4866
4867 check-DEJAGNU-single:
4868         $(AM_V_RUNTEST)$(DO_RUNTEST)
4869
4870 # If running a single job, invoking runtest once is faster & has nicer output.
4871 check-DEJAGNU: site.exp
4872         $(AM_V_at)(set -e; \
4873         EXPECT=${EXPECT} ; export EXPECT ; \
4874         runtest=$(RUNTEST); \
4875         if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4876           case "$(MAKEFLAGS)" in \
4877           *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4878           *)    $(MAKE) check-DEJAGNU-single;; \
4879           esac; \
4880         else \
4881           echo "WARNING: could not find \`runtest'" 1>&2; :;\
4882         fi)
4883
4884 # These tests are build-time only tools.  Override the default rules for them.
4885 testsuite/common/%.o: testsuite/common/%.c
4886         $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4887
4888 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4889         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4890
4891 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4892         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4893
4894 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4895         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4896
4897 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4898         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4899
4900 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4901         $(AM_V_GEN)$< 32 0 big > $@.tmp
4902         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4903         $(AM_V_at)mv $@.tmp $@
4904
4905 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4906         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4907
4908 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4909         $(AM_V_GEN)$< 32 31 little > $@.tmp
4910         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4911         $(AM_V_at)mv $@.tmp $@
4912
4913 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4914         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4915
4916 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4917         $(AM_V_GEN)$< 64 0 big > $@.tmp
4918         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4919         $(AM_V_at)mv $@.tmp $@
4920
4921 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4922         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4923
4924 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4925         $(AM_V_GEN)$< 64 63 little > $@.tmp
4926         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4927         $(AM_V_at)mv $@.tmp $@
4928 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4929
4930 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/modules.o: aarch64/modules.c
4931
4932 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c ; $(SIM_COMPILE)
4933 @SIM_ENABLE_ARCH_aarch64_TRUE@-@am__include@ aarch64/$(DEPDIR)/*.Po
4934 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4935
4936 @SIM_ENABLE_ARCH_arm_TRUE@arm/modules.o: arm/modules.c
4937
4938 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c ; $(SIM_COMPILE)
4939 @SIM_ENABLE_ARCH_arm_TRUE@-@am__include@ arm/$(DEPDIR)/*.Po
4940 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4941
4942 @SIM_ENABLE_ARCH_avr_TRUE@avr/modules.o: avr/modules.c
4943
4944 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c ; $(SIM_COMPILE)
4945 @SIM_ENABLE_ARCH_avr_TRUE@-@am__include@ avr/$(DEPDIR)/*.Po
4946 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4947
4948 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/modules.o: bfin/modules.c
4949
4950 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c ; $(SIM_COMPILE)
4951 @SIM_ENABLE_ARCH_bfin_TRUE@-@am__include@ bfin/$(DEPDIR)/*.Po
4952
4953 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4954 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4955 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)(\
4956 @SIM_ENABLE_ARCH_bfin_TRUE@             set -e; \
4957 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
4958 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4959 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "{"; \
4960 @SIM_ENABLE_ARCH_bfin_TRUE@             $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4961 @SIM_ENABLE_ARCH_bfin_TRUE@             sed -n \
4962 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e 's:^[^       ]*      :0x:' \
4963 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e '/^0x/{s:    .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4964 @SIM_ENABLE_ARCH_bfin_TRUE@                     $@.dis; \
4965 @SIM_ENABLE_ARCH_bfin_TRUE@             rm -f $@.dis; \
4966 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "};" \
4967 @SIM_ENABLE_ARCH_bfin_TRUE@     ) > $@.tmp
4968 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4969 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4970 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4971
4972 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.o: bpf/modules.c
4973
4974 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c ; $(SIM_COMPILE)
4975 @SIM_ENABLE_ARCH_bpf_TRUE@-@am__include@ bpf/$(DEPDIR)/*.Po
4976 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4977
4978 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.o: cr16/modules.c
4979
4980 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c ; $(SIM_COMPILE)
4981 @SIM_ENABLE_ARCH_cr16_TRUE@-@am__include@ cr16/$(DEPDIR)/*.Po
4982
4983 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4984
4985 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4986 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4987 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4988
4989 # gencode is a build-time only tool.  Override the default rules for it.
4990 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4991 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4992 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4993 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4994
4995 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4996 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< -h >$@
4997
4998 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4999 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< >$@
5000 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
5001
5002 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.o: cris/modules.c
5003
5004 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c ; $(SIM_COMPILE)
5005 @SIM_ENABLE_ARCH_cris_TRUE@-@am__include@ cris/$(DEPDIR)/*.Po
5006
5007 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
5008
5009 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
5010 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
5011 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5012 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv10f-switch.c \
5013 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv10f \
5014 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
5015 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
5016 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
5017 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
5018
5019 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
5020 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
5021 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5022 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv32f-switch.c \
5023 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv32f \
5024 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
5025 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
5026 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
5027 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
5028
5029 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
5030
5031 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
5032 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5033 @SIM_ENABLE_ARCH_cris_TRUE@$(srcdir)/cris/arch.h $(srcdir)/cris/arch.c $(srcdir)/cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
5034
5035 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
5036 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5037 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
5038 @SIM_ENABLE_ARCH_cris_TRUE@$(srcdir)/cris/cpuv10.h $(srcdir)/cris/cpuv10.c $(srcdir)/cris/semcrisv10f-switch.c $(srcdir)/cris/modelv10.c $(srcdir)/cris/decodev10.c $(srcdir)/cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
5039
5040 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
5041 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5042 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
5043 @SIM_ENABLE_ARCH_cris_TRUE@$(srcdir)/cris/cpuv32.h $(srcdir)/cris/cpuv32.c $(srcdir)/cris/semcrisv32f-switch.c $(srcdir)/cris/modelv32.c $(srcdir)/cris/decodev32.c $(srcdir)/cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
5044 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
5045
5046 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.o: d10v/modules.c
5047
5048 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c ; $(SIM_COMPILE)
5049 @SIM_ENABLE_ARCH_d10v_TRUE@-@am__include@ d10v/$(DEPDIR)/*.Po
5050
5051 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
5052
5053 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5054 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
5055 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
5056
5057 # gencode is a build-time only tool.  Override the default rules for it.
5058 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
5059 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5060 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
5061 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5062
5063 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
5064 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< -h >$@
5065
5066 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
5067 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< >$@
5068 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
5069
5070 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/modules.o: erc32/modules.c
5071
5072 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c ; $(SIM_COMPILE)
5073 @SIM_ENABLE_ARCH_erc32_TRUE@-@am__include@ erc32/$(DEPDIR)/*.Po
5074
5075 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
5076 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
5077 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
5078 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5079 @SIM_ENABLE_ARCH_erc32_TRUE@    n=`echo sis | sed '$(program_transform_name)'`; \
5080 @SIM_ENABLE_ARCH_erc32_TRUE@    $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
5081 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
5082 @SIM_ENABLE_ARCH_erc32_TRUE@    rm -f $(DESTDIR)$(bindir)/sis
5083 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
5084
5085 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/modules.o: example-synacor/modules.c
5086
5087 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c ; $(SIM_COMPILE)
5088 @SIM_ENABLE_ARCH_examples_TRUE@-@am__include@ example-synacor/$(DEPDIR)/*.Po
5089 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
5090
5091 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.o: frv/modules.c
5092
5093 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c ; $(SIM_COMPILE)
5094 @SIM_ENABLE_ARCH_frv_TRUE@-@am__include@ frv/$(DEPDIR)/*.Po
5095
5096 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
5097
5098 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
5099 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
5100 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5101 @SIM_ENABLE_ARCH_frv_TRUE@              -mono -scache -parallel-generic-write -parallel-only \
5102 @SIM_ENABLE_ARCH_frv_TRUE@              -cpu frvbf \
5103 @SIM_ENABLE_ARCH_frv_TRUE@              -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
5104 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
5105 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
5106 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)touch $@
5107
5108 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
5109
5110 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
5111 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5112 @SIM_ENABLE_ARCH_frv_TRUE@$(srcdir)/frv/arch.h $(srcdir)/frv/arch.c $(srcdir)/frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
5113
5114 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
5115 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
5116 @SIM_ENABLE_ARCH_frv_TRUE@$(srcdir)/frv/cpu.h $(srcdir)/frv/sem.c $(srcdir)/frv/model.c $(srcdir)/frv/decode.c $(srcdir)/frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
5117 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
5118
5119 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/modules.o: ft32/modules.c
5120
5121 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c ; $(SIM_COMPILE)
5122 @SIM_ENABLE_ARCH_ft32_TRUE@-@am__include@ ft32/$(DEPDIR)/*.Po
5123 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
5124
5125 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/modules.o: h8300/modules.c
5126
5127 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c ; $(SIM_COMPILE)
5128 @SIM_ENABLE_ARCH_h8300_TRUE@-@am__include@ h8300/$(DEPDIR)/*.Po
5129 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
5130
5131 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.o: iq2000/modules.c
5132
5133 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c ; $(SIM_COMPILE)
5134 @SIM_ENABLE_ARCH_iq2000_TRUE@-@am__include@ iq2000/$(DEPDIR)/*.Po
5135
5136 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
5137
5138 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
5139 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
5140 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5141 @SIM_ENABLE_ARCH_iq2000_TRUE@           -mono -fast -pbb -switch sem-switch.c \
5142 @SIM_ENABLE_ARCH_iq2000_TRUE@           -cpu iq2000bf \
5143 @SIM_ENABLE_ARCH_iq2000_TRUE@           -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
5144 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
5145 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
5146 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)touch $@
5147
5148 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
5149
5150 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
5151 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5152 @SIM_ENABLE_ARCH_iq2000_TRUE@$(srcdir)/iq2000/arch.h $(srcdir)/iq2000/arch.c $(srcdir)/iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
5153
5154 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
5155 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5156 @SIM_ENABLE_ARCH_iq2000_TRUE@$(srcdir)/iq2000/cpu.h $(srcdir)/iq2000/sem.c $(srcdir)/iq2000/sem-switch.c $(srcdir)/iq2000/model.c $(srcdir)/iq2000/decode.c $(srcdir)/iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
5157 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
5158
5159 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.o: lm32/modules.c
5160
5161 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c ; $(SIM_COMPILE)
5162 @SIM_ENABLE_ARCH_lm32_TRUE@-@am__include@ lm32/$(DEPDIR)/*.Po
5163
5164 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
5165
5166 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
5167 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
5168 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5169 @SIM_ENABLE_ARCH_lm32_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5170 @SIM_ENABLE_ARCH_lm32_TRUE@             -cpu lm32bf \
5171 @SIM_ENABLE_ARCH_lm32_TRUE@             -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
5172 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
5173 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
5174 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)touch $@
5175
5176 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
5177
5178 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
5179 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5180 @SIM_ENABLE_ARCH_lm32_TRUE@$(srcdir)/lm32/arch.h $(srcdir)/lm32/arch.c $(srcdir)/lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
5181
5182 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
5183 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5184 @SIM_ENABLE_ARCH_lm32_TRUE@$(srcdir)/lm32/cpu.h $(srcdir)/lm32/sem.c $(srcdir)/lm32/sem-switch.c $(srcdir)/lm32/model.c $(srcdir)/lm32/decode.c $(srcdir)/lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
5185 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
5186
5187 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.o: m32c/modules.c
5188
5189 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c ; $(SIM_COMPILE)
5190 @SIM_ENABLE_ARCH_m32c_TRUE@-@am__include@ m32c/$(DEPDIR)/*.Po
5191
5192 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
5193
5194 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5195 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
5196 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
5197
5198 # opc2c is a build-time only tool.  Override the default rules for it.
5199 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
5200 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5201
5202 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
5203 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5204 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
5205
5206 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
5207 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5208 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
5209 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
5210
5211 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.o: m32r/modules.c
5212
5213 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c ; $(SIM_COMPILE)
5214 @SIM_ENABLE_ARCH_m32r_TRUE@-@am__include@ m32r/$(DEPDIR)/*.Po
5215
5216 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
5217
5218 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
5219 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
5220 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5221 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5222 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rbf \
5223 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
5224 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
5225 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
5226 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5227
5228 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop-x ; @true
5229 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
5230 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5231 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
5232 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rxf \
5233 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
5234 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
5235 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
5236 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5237
5238 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop-2 ; @true
5239 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
5240 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5241 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
5242 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32r2f \
5243 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
5244 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
5245 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
5246 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
5247
5248 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
5249
5250 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
5251 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5252 @SIM_ENABLE_ARCH_m32r_TRUE@$(srcdir)/m32r/arch.h $(srcdir)/m32r/arch.c $(srcdir)/m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
5253
5254 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
5255 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5256 @SIM_ENABLE_ARCH_m32r_TRUE@$(srcdir)/m32r/cpu.h $(srcdir)/m32r/sem.c $(srcdir)/m32r/sem-switch.c $(srcdir)/m32r/model.c $(srcdir)/m32r/decode.c $(srcdir)/m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
5257
5258 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
5259 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5260 @SIM_ENABLE_ARCH_m32r_TRUE@$(srcdir)/m32r/cpux.h $(srcdir)/m32r/semx-switch.c $(srcdir)/m32r/modelx.c $(srcdir)/m32r/decodex.c $(srcdir)/m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
5261
5262 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
5263 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5264 @SIM_ENABLE_ARCH_m32r_TRUE@$(srcdir)/m32r/cpu2.h $(srcdir)/m32r/sem2-switch.c $(srcdir)/m32r/model2.c $(srcdir)/m32r/decode2.c $(srcdir)/m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
5265 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
5266
5267 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.o: m68hc11/modules.c
5268
5269 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c ; $(SIM_COMPILE)
5270 @SIM_ENABLE_ARCH_m68hc11_TRUE@-@am__include@ m68hc11/$(DEPDIR)/*.Po
5271
5272 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
5273
5274 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5275 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
5276 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
5277
5278 # gencode is a build-time only tool.  Override the default rules for it.
5279 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
5280 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5281
5282 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
5283 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6811 >$@
5284
5285 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
5286 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6812 >$@
5287 @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
5288
5289 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/modules.o: mcore/modules.c
5290
5291 @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c ; $(SIM_COMPILE)
5292 @SIM_ENABLE_ARCH_mcore_TRUE@-@am__include@ mcore/$(DEPDIR)/*.Po
5293 @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
5294
5295 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/modules.o: microblaze/modules.c
5296
5297 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c ; $(SIM_COMPILE)
5298 @SIM_ENABLE_ARCH_microblaze_TRUE@-@am__include@ microblaze/$(DEPDIR)/*.Po
5299 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
5300
5301 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.o: mips/modules.c
5302
5303 @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c ; $(SIM_COMPILE)
5304 @SIM_ENABLE_ARCH_mips_TRUE@-@am__include@ mips/$(DEPDIR)/*.Po
5305
5306 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
5307
5308 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
5309 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
5310 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5311 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
5312 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
5313
5314 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5315 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5316 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5317 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5318 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5319 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5320 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnowidth \
5321 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnounimplemented \
5322 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5323 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5324 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5325 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5326 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.h    -ht mips/itable.h \
5327 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.c    -t  mips/itable.c
5328 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5329
5330 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5331 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5332 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5333 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5334 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5335 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5336 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5337 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5338 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5339 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5340 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5341 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5342 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5343 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5344 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.h    -hc mips/icache.h \
5345 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.c    -c  mips/icache.c \
5346 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.h -hs mips/semantics.h \
5347 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.c -s  mips/semantics.c \
5348 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.h   -hd mips/idecode.h \
5349 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.c   -d  mips/idecode.c \
5350 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.h     -hm mips/model.h \
5351 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.c     -m  mips/model.c \
5352 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.h   -hf mips/support.h \
5353 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.c   -f  mips/support.c \
5354 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.h    -he mips/engine.h \
5355 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.c    -e  mips/engine.c \
5356 @SIM_ENABLE_ARCH_mips_TRUE@             -n irun.c      -r  mips/irun.c
5357 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5358
5359 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5360 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5361 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5362 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5363 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5364 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5365 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_M16_FLAGS) \
5366 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5367 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5368 @SIM_ENABLE_ARCH_mips_TRUE@             -B 16 \
5369 @SIM_ENABLE_ARCH_mips_TRUE@             -H 15 \
5370 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5371 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_M16_DC) \
5372 @SIM_ENABLE_ARCH_mips_TRUE@             -P m16_ \
5373 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5374 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.h    -hc mips/m16_icache.h \
5375 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.c    -c  mips/m16_icache.c \
5376 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.h -hs mips/m16_semantics.h \
5377 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.c -s  mips/m16_semantics.c \
5378 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.h   -hd mips/m16_idecode.h \
5379 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.c   -d  mips/m16_idecode.c \
5380 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.h     -hm mips/m16_model.h \
5381 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.c     -m  mips/m16_model.c \
5382 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.h   -hf mips/m16_support.h \
5383 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.c   -f  mips/m16_support.c
5384 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5385
5386 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5387 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5388 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5389 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5390 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5391 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5392 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
5393 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5394 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5395 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
5396 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
5397 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5398 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
5399 @SIM_ENABLE_ARCH_mips_TRUE@             -P m32_ \
5400 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5401 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.h    -hc mips/m32_icache.h \
5402 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.c    -c  mips/m32_icache.c \
5403 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.h -hs mips/m32_semantics.h \
5404 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.c -s  mips/m32_semantics.c \
5405 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.h   -hd mips/m32_idecode.h \
5406 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.c   -d  mips/m32_idecode.c \
5407 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.h     -hm mips/m32_model.h \
5408 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.c     -m  mips/m32_model.c \
5409 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.h   -hf mips/m32_support.h \
5410 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.c   -f  mips/m32_support.c
5411 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5412
5413 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5414 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5415 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5416 @SIM_ENABLE_ARCH_mips_TRUE@       p=`echo $${t} | sed -e 's/:.*//'` ; \
5417 @SIM_ENABLE_ARCH_mips_TRUE@       m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5418 @SIM_ENABLE_ARCH_mips_TRUE@       f=`echo $${t} | sed -e 's/.*://'` ; \
5419 @SIM_ENABLE_ARCH_mips_TRUE@       case $${p} in \
5420 @SIM_ENABLE_ARCH_mips_TRUE@         micromips16*) \
5421 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5422 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32* | micromips64*) \
5423 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5424 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m32*) \
5425 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5426 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5427 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m64*) \
5428 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5429 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5430 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5431 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5432 @SIM_ENABLE_ARCH_mips_TRUE@         *) \
5433 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5434 @SIM_ENABLE_ARCH_mips_TRUE@       esac; \
5435 @SIM_ENABLE_ARCH_mips_TRUE@       $(IGEN_RUN) \
5436 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
5437 @SIM_ENABLE_ARCH_mips_TRUE@             $${e} \
5438 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
5439 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
5440 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
5441 @SIM_ENABLE_ARCH_mips_TRUE@             -M $${m} \
5442 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
5443 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
5444 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
5445 @SIM_ENABLE_ARCH_mips_TRUE@             -P $${p}_ \
5446 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
5447 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.h    -hc mips/$${p}_icache.h \
5448 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.c    -c  mips/$${p}_icache.c \
5449 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5450 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.c -s  mips/$${p}_semantics.c \
5451 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
5452 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
5453 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.h     -hm mips/$${p}_model.h \
5454 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.c     -m  mips/$${p}_model.c \
5455 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.h   -hf mips/$${p}_support.h \
5456 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.c   -f  mips/$${p}_support.c \
5457 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.h    -he mips/$${p}_engine.h \
5458 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.c    -e  mips/$${p}_engine.c \
5459 @SIM_ENABLE_ARCH_mips_TRUE@         || exit; \
5460 @SIM_ENABLE_ARCH_mips_TRUE@     done
5461 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5462
5463 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5464 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
5465 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5466 @SIM_ENABLE_ARCH_mips_TRUE@       case $${t} in \
5467 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
5468 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5469 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/m16$${m}_run.c; \
5470 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5471 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/m16$${m}_/" \
5472 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/m16$${m}_engine/" \
5473 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m16_/m16$${m}_/" \
5474 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5475 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5476 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5477 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5478 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32*) \
5479 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5480 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5481 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5482 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips32$${m}_/" \
5483 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5484 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5485 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips32$${m}_/" \
5486 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
5487 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5488 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5489 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5490 @SIM_ENABLE_ARCH_mips_TRUE@         micromips64*) \
5491 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5492 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
5493 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5494 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips64$${m}_/" \
5495 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5496 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
5497 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips64$${m}_/" \
5498 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m64$${m}_/" \
5499 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
5500 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5501 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
5502 @SIM_ENABLE_ARCH_mips_TRUE@       esac \
5503 @SIM_ENABLE_ARCH_mips_TRUE@     done
5504 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
5505 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5506
5507 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.o: mn10300/modules.c
5508
5509 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c ; $(SIM_COMPILE)
5510 @SIM_ENABLE_ARCH_mn10300_TRUE@-@am__include@ mn10300/$(DEPDIR)/*.Po
5511
5512 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
5513
5514 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5515 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5516 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_GEN)$(IGEN_RUN) \
5517 @SIM_ENABLE_ARCH_mn10300_TRUE@          $(mn10300_IGEN_TRACE) \
5518 @SIM_ENABLE_ARCH_mn10300_TRUE@          -G gen-direct-access \
5519 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M mn10300,am33 -G gen-multi-sim=am33 \
5520 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M am33_2 \
5521 @SIM_ENABLE_ARCH_mn10300_TRUE@          -I $(srcdir)/mn10300 \
5522 @SIM_ENABLE_ARCH_mn10300_TRUE@          -i $(mn10300_IGEN_INSN) \
5523 @SIM_ENABLE_ARCH_mn10300_TRUE@          -o $(mn10300_IGEN_DC) \
5524 @SIM_ENABLE_ARCH_mn10300_TRUE@          -x \
5525 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.h    -hc mn10300/icache.h \
5526 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.c    -c  mn10300/icache.c \
5527 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.h -hs mn10300/semantics.h \
5528 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.c -s  mn10300/semantics.c \
5529 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.h   -hd mn10300/idecode.h \
5530 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.c   -d  mn10300/idecode.c \
5531 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.h     -hm mn10300/model.h \
5532 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.c     -m  mn10300/model.c \
5533 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.h   -hf mn10300/support.h \
5534 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.c   -f  mn10300/support.c \
5535 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.h    -ht mn10300/itable.h \
5536 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.c    -t  mn10300/itable.c \
5537 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.h    -he mn10300/engine.h \
5538 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.c    -e  mn10300/engine.c \
5539 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n irun.c      -r  mn10300/irun.c
5540 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)touch $@
5541 @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5542
5543 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/modules.o: moxie/modules.c
5544
5545 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c ; $(SIM_COMPILE)
5546 @SIM_ENABLE_ARCH_moxie_TRUE@-@am__include@ moxie/$(DEPDIR)/*.Po
5547
5548 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5549 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_GEN) \
5550 @SIM_ENABLE_ARCH_moxie_TRUE@    if test "x$(DTC)" != x; then \
5551 @SIM_ENABLE_ARCH_moxie_TRUE@      $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5552 @SIM_ENABLE_ARCH_moxie_TRUE@      $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5553 @SIM_ENABLE_ARCH_moxie_TRUE@      touch ${srcdir}/moxie/moxie-gdb.dtb; \
5554 @SIM_ENABLE_ARCH_moxie_TRUE@    else \
5555 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "Could not update the moxie-gdb.dtb file because the device "; \
5556 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
5557 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "update the device tree blob."; \
5558 @SIM_ENABLE_ARCH_moxie_TRUE@    fi
5559 @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5560
5561 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/modules.o: msp430/modules.c
5562
5563 @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c ; $(SIM_COMPILE)
5564 @SIM_ENABLE_ARCH_msp430_TRUE@-@am__include@ msp430/$(DEPDIR)/*.Po
5565 @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5566
5567 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.o: or1k/modules.c
5568
5569 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c ; $(SIM_COMPILE)
5570 @SIM_ENABLE_ARCH_or1k_TRUE@-@am__include@ or1k/$(DEPDIR)/*.Po
5571
5572 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
5573
5574 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5575 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5576 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5577 @SIM_ENABLE_ARCH_or1k_TRUE@             -mono -fast -pbb -switch sem-switch.c \
5578 @SIM_ENABLE_ARCH_or1k_TRUE@             -cpu or1k32bf \
5579 @SIM_ENABLE_ARCH_or1k_TRUE@             -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5580 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5581 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5582 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)touch $@
5583
5584 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5585
5586 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5587 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5588 @SIM_ENABLE_ARCH_or1k_TRUE@$(srcdir)/or1k/arch.h $(srcdir)/or1k/arch.c $(srcdir)/or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5589
5590 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5591 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5592 @SIM_ENABLE_ARCH_or1k_TRUE@$(srcdir)/or1k/cpu.h $(srcdir)/or1k/cpu.c $(srcdir)/or1k/model.c $(srcdir)/or1k/sem.c $(srcdir)/or1k/sem-switch.c $(srcdir)/or1k/decode.c $(srcdir)/or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5593 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/libsim.a: common/libcommon.a
5594 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5595
5596 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
5597 @SIM_ENABLE_ARCH_ppc_TRUE@      $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
5598
5599 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5600 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5601 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5602 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5603
5604 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5605 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5606 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5607 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.h
5608 @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5609
5610 @SIM_ENABLE_ARCH_pru_TRUE@pru/modules.o: pru/modules.c
5611
5612 @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c ; $(SIM_COMPILE)
5613 @SIM_ENABLE_ARCH_pru_TRUE@-@am__include@ pru/$(DEPDIR)/*.Po
5614 @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5615
5616 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/modules.o: riscv/modules.c
5617
5618 @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c ; $(SIM_COMPILE)
5619 @SIM_ENABLE_ARCH_riscv_TRUE@-@am__include@ riscv/$(DEPDIR)/*.Po
5620 @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5621
5622 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/modules.o: rl78/modules.c
5623
5624 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c ; $(SIM_COMPILE)
5625 @SIM_ENABLE_ARCH_rl78_TRUE@-@am__include@ rl78/$(DEPDIR)/*.Po
5626 @SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
5627
5628 @SIM_ENABLE_ARCH_rx_TRUE@rx/modules.o: rx/modules.c
5629
5630 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c ; $(SIM_COMPILE)
5631 @SIM_ENABLE_ARCH_rx_TRUE@-@am__include@ rx/$(DEPDIR)/*.Po
5632 @SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
5633
5634 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.o: sh/modules.c
5635
5636 @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c ; $(SIM_COMPILE)
5637 @SIM_ENABLE_ARCH_sh_TRUE@-@am__include@ sh/$(DEPDIR)/*.Po
5638
5639 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
5640
5641 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5642 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5643 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5644
5645 # gencode is a build-time only tool.  Override the default rules for it.
5646 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5647 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5648
5649 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5650 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -x >$@
5651
5652 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5653 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -p >$@
5654
5655 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5656 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -s >$@
5657 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
5658
5659 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.o: v850/modules.c
5660
5661 @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c ; $(SIM_COMPILE)
5662 @SIM_ENABLE_ARCH_v850_TRUE@-@am__include@ v850/$(DEPDIR)/*.Po
5663
5664 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
5665
5666 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5667 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5668 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
5669 @SIM_ENABLE_ARCH_v850_TRUE@             $(v850_IGEN_TRACE) \
5670 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-direct-access \
5671 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-zero-r0 \
5672 @SIM_ENABLE_ARCH_v850_TRUE@             -i $(v850_IGEN_INSN) \
5673 @SIM_ENABLE_ARCH_v850_TRUE@             -o $(v850_IGEN_DC) \
5674 @SIM_ENABLE_ARCH_v850_TRUE@             -x \
5675 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.h    -hc v850/icache.h \
5676 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.c    -c  v850/icache.c \
5677 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.h -hs v850/semantics.h \
5678 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.c -s  v850/semantics.c \
5679 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.h   -hd v850/idecode.h \
5680 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.c   -d  v850/idecode.c \
5681 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.h     -hm v850/model.h \
5682 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.c     -m  v850/model.c \
5683 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.h   -hf v850/support.h \
5684 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.c   -f  v850/support.c \
5685 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.h    -ht v850/itable.h \
5686 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.c    -t  v850/itable.c \
5687 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.h    -he v850/engine.h \
5688 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.c    -e  v850/engine.c \
5689 @SIM_ENABLE_ARCH_v850_TRUE@             -n irun.c      -r  v850/irun.c
5690 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)touch $@
5691
5692 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5693
5694 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5695         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5696         lib=`echo sim | sed '$(program_transform_name)'`; \
5697         for d in $(SIM_ENABLED_ARCHES); do \
5698                 n="$$lib"; \
5699                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5700                 n="lib$$n.a"; \
5701                 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
5702         done
5703
5704 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5705         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5706         run=`echo run | sed '$(program_transform_name)'`; \
5707         for d in $(SIM_ENABLED_ARCHES); do \
5708                 n="$$run"; \
5709                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5710                 $(LIBTOOL) --mode=install \
5711                         $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
5712         done
5713
5714 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5715         rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
5716         for d in $(SIM_ENABLED_ARCHES); do \
5717                 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5718         done
5719
5720 # Tell versions [3.59,3.63) of GNU make to not export all variables.
5721 # Otherwise a system limit (for SysV at least) may be exceeded.
5722 .NOEXPORT: