85051e086eb1f105816b2b5fd49b3d3fd69aa018
10 if (num
>= res
+ bit
):
12 res
= (res
>> 1) + bit
21 //This is the main code of integer sqrt function found here:http://verilogcodes.blogspot.com/2017/11/a-verilog-function-for-finding-square-root.html
28 //Verilog function to find square root of a 32 bit number.
29 //The output is 16 bit.
31 input [31:0] num; //declare input
32 //intermediate signals.
35 reg [17:0] left,right,r;
38 //initialize all the variables.
42 left = 0; //input to adder/sub
43 right = 0; //input to adder/sub
45 //run the calculations for 16 iterations.
46 for(i=0;i<16;i=i+1) begin
47 right = {q,r[17],1'b1};
48 left = {r[15:0],a[31:30]};
49 a = {a[29:0],2'b00}; //left shift by 2 bits.
50 if (r[17] == 1) //add if r is negative
52 else //subtract if r is positive
56 sqrt = q; //final assignment of output.
58 endfunction //end of Function
61 c version (from paper linked from URL)
63 unsigned squart(D, r) /*Non-Restoring sqrt*/
64 unsigned D; /*D:32-bit unsigned integer to be square rooted */
67 unsigned Q = 0; /*Q:16-bit unsigned integer (root)*/
68 int R = 0; /*R:17-bit integer (remainder)*/
70 for (i = 15;i>=0;i--) /*for each root bit*/
74 R = R<<2)|((D>>(i+i))&3);
75 R = R-((Q<<2)|1); /*-Q01*/
79 R = R<<2)|((D>>(i+i))&3);
80 R = R+((Q<<2)|3); /*+Q11*/
82 if (R>=0) Q = Q<<1)|1; /*new Q:*/
83 else Q = Q<<1)|0; /*new Q:*/
86 /*remainder adjusting*/
87 if (R<0) R = R+((Q<<1)|1);
88 *r = R; /*return remainder*/
89 return(Q); /*return root*/
94 short isqrt(short num) {
96 short bit = 1 << 14; // The second-to-top bit is set: 1 << 30 for 32 bits
98 // "bit" starts at the highest power of four <= the argument.
103 if (num >= res + bit) {
105 res = (res >> 1) + bit;